MAX9939
SPI Programmable-Gain Amplifier
with Input V
OS
Trim and Output Op Amp
8
Maxim Integrated
CMRR, gain accuracy, and very low temperature drift
due to precise resistor matching. The output of this
amplifier is level shifted to V
CC
/2.
This amplifier is followed by a programmable-gain
inverting amplifier (amplifier A) with programmable R
F
and R
I
resistors whose gain varies between 0.2V/V and
157V/V. The output of this amplifier is biased at
V
CC
/2 and has extremely high gain accuracy and low
temperature drift.
The MAX9939 has an uncommitted op amp (amplifier
B) whose noninverting input is referenced to V
CC
/2. Its
inverting input and output are externally accessible,
allowing it to be configured either as an active filter or
as a differential output.
A robust input ESD protection scheme allows input volt-
ages at INA+ and INA- to reach ±16V without damag-
ing the MAX9939, thus making the part extremely
attractive for use in front-ends that can be exposed to
high voltages during fault conditions. In addition, its
input-voltage range extends down to -V
CC
/2 (e.g., -2.5V
when powered from a 5V single supply) allowing the
MAX9939 to translate below ground signals to a 0V to
5V output signal. This feature simplifies interfacing
ground-referenced signals with unipolar-input ADCs.
SPI-Compatible Serial Interface
The MAX9939 has a write-only interface, consisting of
three inputs: the clock signal (SCLK), data input (DIN),
and chip-select input (CS). The serial interface works
with the clock polarity (CPOL) and clock phase (CPHA)
both set to 0 (see Figure 1). Initiating a write to the
MAX9939 is accomplished by pulling CS low. Data is
clocked in on the rising edge of each clock pulse, and
is written LSB first. Each write to the MAX9939 consists
of 8 bits (1 byte). Pull CS high after the 8th bit has been
clocked in to latch the data and before sending the
next byte of instruction. Note that the internal register is
not updated if CS is pulled high before the falling edge
of the 8th clock pulse.
Register Description
The MAX9939 consists of three registers: a shift register
and two internal registers. The shift register accepts
data and transfers it to either of the two internal regis-
ters. The two internal registers store data that is used to
determine the gain, input offset voltage, and operating
modes of the amplifier. The two internal registers are the
Input V
OS
Trim register and Gain register. The format of
the 8-bit write to these registers is shown in Tables 1
and 2. Data is sent to the shift register LSB first.
SEL: The SEL bit selects which internal register is writ-
ten to. Set SEL to 0 to write bits D5:D1 to the input V
OS
trim register. Set SEL to 1 to write D4:D1 to the Gain
register (D5 is don’t care when SEL = 1).
