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74ABT16374CSSCX

P1-P3P4-P6
© 2005 Fairchild Semiconductor Corporation DS011668 www.fairchildsemi.com
March 1994
Revised May 2005
74ABT16374 16-Bit D-Type Flip-Flop with 3-STATE Outputs
74ABT16374
16-Bit D-Type Flip-Flop with 3-STATE Outputs
General Description
The ABT16374 contains sixteen non-inverting D-type flip-
flops with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. A buffered clock
(CP) and Output Enable (OE
) are common to each byte
and can be shorted together for full 16-bit operation.
Features
■ Separate control logic for each byte
■ 16-bit version of the ABT374
■ Edge-triggered D-type inputs
■ Buffered Positive edge-triggered clock
■ High impedance glitch free bus loading during entire
power up and power down cycle
■ Non-destructive hot insertion capability
■ Guaranteed latch-up protection
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Connection Diagram
Order Number Package Number Package Description
74ABT16374CSSC MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74ABT16374CMTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Name Description
OE
n
3-STATE Output Enable Input (Active LOW)
CP
n
Clock Pulse Input (Active Rising Edge)
D
0
–D
15
Data Inputs
O
0
–O
15
3-STATE Outputs
www.fairchildsemi.com 2
74ABT16374
Functional Description
The ABT16374 consists of sixteen edge-triggered flip-flops
with individual D-type inputs and 3-STATE true outputs.
The device is byte controlled with each byte functioning
identically, but independent of the other. The control pins
can be shorted together to obtain full 16-bit operation. Each
byte has a buffered clock and buffered Output Enable com-
mon to all flip-flops within that byte. The description which
follows applies to each byte. Each flip-flop will store the
state of their individual D inputs that meet the setup and
hold time requirements on the LOW-to-HIGH Clock (CP
n
)
transition. With the Output Enable (OE
n
) LOW, the con-
tents of the flip-flops are available at the outputs. When
OE
n
is HIGH, the outputs go to the high impedance state.
Operation of the OE
n
input does not affect the state of the
flip-flops.
Truth Tables
H HIGH Voltage Level
L
LOW Voltage Level
X
Immaterial
Z
High Impedance
Logic Diagrams
Byte 1 (0:7)
Byte 2 (8:15)
Inputs Outputs
CP
1
OE
1
D
0
–D
7
O
0
–O
7
L H H
L L L
L L X (Previous)
X H X Z
Inputs Outputs
CP
2
OE
2
D
8
–D
15
O
8
–O
15
L H H
L L L
L L X (Previous)
X H X Z
3 www.fairchildsemi.com
74ABT16374
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Note 3: Guaranteed, but not tested.
Note 4: For 8-bit toggling, I
CCD
0.8 mA/MHz.
Storage Temperature 65 C to 150 C
Ambient Temperature under Bias
55 C to 125 C
Junction Temperature under Bias
55 C to 150 C
V
CC
Pin Potential to Ground Pin 0.5V to 7.0V
Input Voltage (Note 2)
0.5V to 7.0V
Input Current (Note 2)
30 mA to 5.0 mA
Voltage Applied to Any Output
in the Disabled or
Power-Off State
0.5V to 5.5V
in the HIGH State
0.5V to V
CC
Current Applied to Output
in LOW State (Max) twice the rated I
OL
(mA)
DC Latchup Source Current:
OE
Pin 350 mA
(Across Comm Operating Range)
Other Pins
500 mA
Over Voltage Latchup (I/O) 10V
Free Air Ambient Temperature
40 C to 85 C
Supply Voltage
4.5V to 5.5V
Minimum Input Edge Rate (
V/ t)
Data Input 50 mV/ns
Enable Input 20 mV/ns
Clock Input 100mV/ns
Symbol Parameter Min Typ Max Units
V
CC
Conditions
V
IH
Input HIGH Voltage 2.0 V Recognized HIGH Signal
V
IL
Input LOW Voltage 0.8 V Recognized LOW Signal
V
CD
Input Clamp Diode Voltage 1.2 V Min I
IN
18 mA
V
OH
Output HIGH Voltage 2.5 V Min I
OH
3 mA
2.0 V Min I
OH
32 mA
V
OL
Output LOW Voltage 0.55 V Min I
OL
64 mA
I
IH
Input HIGH Current 1
AMax
V
IN
2.7V (Note 3)
1V
IN
V
CC
I
BVI
Input HIGH Current Breakdown Test 7 AMaxV
IN
7.0V
I
IL
Input LOW Current 1
AMax
V
IN
0.5V (Note 3)
1V
IN
0.0V
V
ID
Input Leakage Test 4.75 V 0.0 I
ID
1.9 A
All Other Pins Grounded
I
OZH
Output Leakage Current 10 A05.5V V
OUT
2.7V; OE 2.0V
I
OZL
Output Leakage Current 10 A05.5V V
OUT
0.5V; OE 2.0V
I
OS
Output Short-Circuit Current 100 275 mA Max V
OUT
0.0V
I
CEX
Output HIGH Leakage Current 50 AMaxV
OUT
V
CC
I
ZZ
Bus Drainage Test 100 A0.0V
OUT
5.5V; All Others V
CC
or GND
I
CCH
Power Supply Current 2.0 mA Max All Outputs HIGH
I
CCL
Power Supply Current 62 mA Max All Outputs LOW
I
CCZ
Power Supply Current 2.0 mA Max OE V
CC
; All Others at V
CC
or GND
I
CCT
Additional I
CC
/Input Outputs Enabled 2.5 mA V
I
V
CC
2.1V
Outputs 3-STATE 2.5 mA Max Enable Input V
I
V
CC
2.1V
Outputs 3-STATE 2.5 mA Data Input V
I
V
CC
2.1V
All Others at V
CC
or GND
I
CCD
Dynamic I
CC
No Load mA/
Max
Outputs Open
(Note 3) 0.30 MHz OE GND, (Note 4)
One Bit Toggling, 50% Duty Cycle
P1-P3P4-P6

74ABT16374CSSCX

Mfr. #:
Buy 74ABT16374CSSCX
Manufacturer:
ON Semiconductor
Description:
IC FF D-TYPE DUAL 8BIT 48SSOP
Lifecycle:
New from this manufacturer.
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