© 2014 Exar Corporation
XR81101
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Rev 1A
Application Information
Termination for LVCMOS Outputs
The termination schemes shown in Figure 2 and Figure 3
are typical for LVCMOS outputs. A split supply approach
can be used utilizing the scope’s internal 50: impedance,
as shown in Figure 4.
Figure 2: XR81101 3.3V LVCMOS Output Termination
Figure 3: XR81101 2.5V LVCMOS Output Termination
Figure 4: XR81101 Split Supply LVCMOS Output Termination
Output Signal Timing Definitions
The following diagrams clarify the common definitions of
the AC timing measurements.
Figure 5: Cycle-to-Cycle Jitter
Figure 6: Output Rise/Fall Time
