1. General description
The 74LV241 is a low-voltage, Si-gate CMOS device and is pin and function compatible
with 74HC241 and 74HCT241.
The 74LV241 is an octal non-inverting buffer/line driver with 3-state outputs. The 3-state
outputs are controlled by the output enable inputs (pins 1OE and 2OE).
2. Features
■ Optimized for low-voltage applications from 1.0 V to 3.6 V
■ Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
■ Typical V
OLP
(output ground bounce) < 0.8 V at V
CC
= 3.3 V and T
amb
=25°C
■ Typical V
OHV
(output V
OH
undershoot)>2V at V
CC
= 3.3 V and T
amb
=25°C
■ ESD protection:
◆ HBM EIA/JESD22-A114-C exceeds 2000 V
◆ MM EIA/JESD22-A115-A exceeds 200 V
3. Quick reference data
[1] C
PD
is used to determine the dynamic power dissipation (P
D
in µW).
P
D
=C
PD
× V
CC
2
× f
i
× N+Σ(C
L
× V
CC
2
× f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
Σ(C
L
× V
CC
2
× f
o
) = sum of the outputs.
74LV241
Octal buffer/line driver; 3-state
Rev. 03 — 10 October 2005 Product data sheet
Table 1: Quick reference data
GND = 0 V; T
amb
=25
°
C; t
r
=t
f
≤
2.5 ns.
Symbol Parameter Conditions Min Typ Max Unit
t
PHL
, t
PLH
propagation delay
1An to 1Yn, 2An to 2Yn
C
L
=15pF;
V
CC
= 3.3 V
- 8.0 - ns
C
i
input capacitance - 3.5 - pF
C
PD
power dissipation
capacitance
V
CC
= 3.3 V;
V
I
= GND to V
CC
[1]
-30- pF
