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CY15B004J-SXE

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CY15B004J
Document Number: 002-10549 Rev. *B Page 10 of 18
Data Retention and Endurance
Parameter Description Test condition Min Max Unit
T
DR
Data retention T
A
= 125 C 11000 – Hours
T
A
= 105 C11–Years
T
A
= 85 C 121 – Years
NV
C
Endurance Over Operating Temperature 10
13
– Cycles
Example of an F-RAM Life Time in an AEC-Q100 Automotive Application
An application does not operate under a steady temperature for the entire usage life time of the application. Instead, it is often expected
to operate in multiple temperature environments throughout the application’s usage life time. Accordingly, the retention specification
for F-RAM in applications often needs to be calculated cumulatively. An example calculation for a multi-temperature thermal profiles
is given below.
Temperature
T
Time Factor
t
Acceleration Factor with respect to Tmax
A
[5]
Profile Factor
P
Profile Life Time
L (P)
T1 = 125 C t1 = 0.1 A1 = 1
8.33 > 10.46 Years
T2 = 105 C t2 = 0.15 A2 = 8.67
T3 = 85 C t3 = 0.25 A3 = 95.68
T4 = 55 C t4 = 0.50 A4 = 6074.80
A
LT
LTmax
------------------------
e
Ea
k
-------
1
T
---
1
Tmax
----------------
–


==
P
1
t1
A1
-------
t2
A2
-------
t3
A3
-------
t4
A4
-------
+++


--------------------------------------------------------
=
LP PLTmax=
Capacitance
Parameter
[6]
Description Test Conditions Max Unit
C
O
Output pin capacitance (SDA) T
A
= 25 C, f = 1 MHz, V
DD
= V
DD
(typ) 8 pF
C
I
Input pin capacitance 6pF
Thermal Resistance
Parameter
[6]
Description Test Conditions 8-pin SOIC Unit
JA
Thermal resistance
(junction to ambient)
Test conditions follow standard test methods and
procedures for measuring thermal impedance, per
EIA/JESD51.
147 C/W
JC
Thermal resistance
(junction to case)
47 C/W
Notes
5. Where k is the Boltzmann constant 8.617 ×
10
-5
eV/K, Tmax is the highest temperature specified for the product, and T is any temperature within the F-RAM product
specification. All temperatures are in Kelvin in the equation.
6. This parameter is periodically sampled and not 100% tested.
CY15B004J
Document Number: 002-10549 Rev. *B Page 11 of 18
AC Test Conditions
Input pulse levels .................................10% and 90% of V
DD
Input rise and fall times .................................................10 ns
Input and output timing reference levels ................0.5 × V
DD
Output load capacitance ............................................ 100 pF
AC Test Loads and Waveforms
Figure 12. AC Test Loads and Waveforms
3.6 V
OUTPUT
100 pF
1.1 k
CY15B004J
Document Number: 002-10549 Rev. *B Page 12 of 18
AC Switching Characteristics
Over the Operating Range
Parameter
[7]
Description Min Max Min Max Min Max Unit
Cypress
Parameter
Alt.
Parameter
f
SCL
[8]
SCL clock frequency – 0.1 – 0.4 – 1.0 MHz
t
SU; STA
Start condition setup for repeated Start 4.7 – 0.6 – 0.25 – µs
t
HD;STA
Start condition hold time 4.0 – 0.6 – 0.25 – µs
t
LOW
Clock LOW period 4.7 – 1.3 – 0.6 – µs
t
HIGH
Clock HIGH period 4.0 – 0.6 – 0.4 – µs
t
SU;DAT
t
SU;DATA
Data in setup 250 – 100 – 100 – ns
t
HD;DAT
t
HD;DATA
Data in hold 0 – 0 – 0 – ns
t
DH
Data output hold (from SCL @ V
IL
) 0 – 0 – 0 – ns
t
R
[9]
t
r
Input rise time – 1000 – 300 – 300 ns
t
F
[9]
t
f
Input fall time – 300 – 300 – 100 ns
t
SU;STO
STOP condition setup 4.0 – 0.6 – 0.25 – µs
t
AA
t
VD;DATA
SCL LOW to SDA Data Out Valid – 3 – 0.9 – 0.55 µs
t
BUF
Bus free before new transmission 4.7 – 1.3 – 0.5 – µs
t
SP
Noise suppression time constant on SCL, SDA – 50 – 50 – 50 ns
Figure 13. Read Bus Timing Diagram
Figure 14. Write Bus Timing Diagram
t
SU:STA
Start
t
R
t
F
Stop Start
t
BUF
t
HIGH
1/fSCL
t
LOW
t
SP
t
SP
Acknowledge
t
HD:DAT
t
SU:DAT
t
AA
t
DH
SCL
SDA
t
SU:STO
Start
Stop Start Acknowledge
t
AA
t
HD:DAT
t
HD:STA
SCL
SDA
t
SU:DAT
Notes
7. Test conditions assume signal transition time of 10 ns or less, timing reference levels of V
DD
/2, input pulse levels of 0 to V
DD
(typ), and output loading of the specified
I
OL
and load capacitance shown in Figure 12.
8. The speed-related specifications are guaranteed characteristic points along a continuous curve of operation from DC to f
SCL
(max).
9. These parameters are guaranteed by design and are not tested.
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CY15B004J-SXE

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Description:
F-RAM F-RAM Memory Serial
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