Document Number: 38-07060 Rev. *J Page 5 of 15
Function Control of the TTL Input Logic
Used to Accept or Invert the Input Signal
LVTTL/LVCMOS INPUT LOGIC
Input Condition Input Logic Output Logic Q pins
Ground IN– Pin 7 – –
IN+ Pin 6 Input True
V
CC
IN– Pin 7 – –
IN+ Pin 6 Input Invert
Ground IN+ Pin 6 – –
IN– Pin 7 Input Invert
V
CC
IN+ Pin 6 – –
IN– Pin 7 Input True
Power Supply Characteristics
Parameter Description Test Conditions Min Typ Max Unit
I
CCD
Dynamic power supply current V
DD
= Max
Input toggling 50% duty cycle,
outputs loaded
–1.52.0
mA/
MHz
I
C
Total power supply current V
DD
= Max
input toggling 50% duty cycle,
outputs loaded, fL= 100 MHz
–90100mA
