TC1272/TC1273/TC1274
DS21382C-page 6 2007 Microchip Technology Inc.
4.2 V
CC
Transient Rejection
The TC1272/TC1273/TC1274 provides accurate V
CC
monitoring and reset timing during power-up, power-
down and brownout/sag conditions, and rejects
negative-going transients (glitches) on the power
supply line. Figure 4-5 shows the maximum transient
duration vs. maximum negative excursion (overdrive)
for glitch rejection. Any combination of duration and
overdrive that lays under the curve will not generate a
reset signal. Combinations above the curve are
detected as a brownout or power-down condition.
Transient immunity can be improved by adding a
capacitor in close proximity to the V
CC
pin of the
TC1272/TC1273/TC1274.
4.3 RESET Signal Integrity During
Power-Down
The TC1272 RESET output is valid to V
CC
= 1.2V.
Below this voltage the output becomes an "open
circuit" and does not sink current. This means CMOS
logic inputs to the P will be floating at an undeter-
mined voltage. Most digital systems are completely
shut down well above this voltage. However, in situa-
tions where RESET
must be maintained valid to
V
CC
= 0V, a pull-down resistor must be connected from
RESET to ground to discharge stray capacitances and
hold the output low (Figure 4-6). This resistor value,
though not critical, should be chosen such that it does
not appreciably load RESET
under normal operation
(100 k will be suitable for most applications). Simi-
larly, a pull-up resistor to V
CC
is required for the
TC1274 to ensure a valid high RESET for V
CC
below
1.8V.
FIGURE 4-5: Maximum Transient
Duration vs. Overdrive For Glitch Rejection At
+25°C.
FIGURE 4-6: Ensuring Reset
Valid To
V
cc
=0V.
RESET COMPARATOR OVERDRIVE,
[V
CCTP
-V
CC
] (mV)
500
300
200
400
100
0
1
10
100
1000
MAXIMUM TRANSIENT DURATION (µsec)
T
A
= +25°C
V
TH
Duration
Overdrive
V
CC
TC1272/3/4
TC1272
V
CC
V
CC
R
1
100 k
RESET
GND
