MC74VHC1GT66
http://onsemi.com
6
Figure 8. Propagation Delay Output Enable/Disable
Test Set−Up
Figure 9. Power Dissipation Capacitance
Test Set−Up
51
2
43
V
CC
V
CC
V
CC
2
1
2
1
R
L
C
L
*
*Includes all probe and jig capacitance.
51
2
43
V
CC
N/C
N/C
TEST POINT
Switch to Position 2 when testing t
PLZ
and t
PZL
Switch to Position 1 when testing t
PHZ
and t
PZH
A
Figure 10. Maximum On−Channel Bandwidth
Test Set−Up
Figure 11. Off−Channel Feedthrough Isolation
Test Set−Up
Figure 12. Feedthrough Noise, ON/OFF Control to
Analog Out, Test Set−Up
Figure 13. Total Harmonic Distortion Test Set−Up
51
2
43
V
CC
*Includes all probe and jig capacitance.
dB
Meter
0.1 mF
V
OS
f
in
51
2
43
V
CC
*Includes all probe and jig capacitance.
dB
Meter
0.1 mF
V
OS
f
in
R
L
V
IS
51
2
43
V
CC
*Includes all probe and jig capacitance.
V
OS
(V
CC
)/2
I
S
R
L
R
L
GND
V
IH
V
IN
v 1MHz
t
r
+ t
f
+ 2ns
51
2
43
V
CC
*Includes all probe and jig capacitance.
0.1 mF
V
IS
f
in
V
OS
To Distortion
Meter
(V
CC
)/2
R
L
V
IH