DocID028356 Rev 1 7/16
STA1074, STA1078, STA1079, STA1088 System description
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Figure 3. CAN subsystem isolation
A specific set of peripherals can be reserved and locked to be only accessible from
CortexM3, thus allowing the implementation of a complete independent subsystem.
Moreover, specific secure GPIOs as well as wake signals are reserved for such a
subsystem.
2.7 SDMMC
Telemaco2 family devices are equipped with SDMMC controllers, which allow interfacing to
either mass storage devices, or to Wi-Fi modules. Both interfaces implement the following
specification:
eMMC - Multimedia Card 4.4
SD/SDIO 4.0
2.8 DMA
DMA is designed to efficiently perform memory to memory, and memory to peripherals
transfers, offloading such tasks from the processor, thus reducing interrupt handling load.
DMA provides 16 independent channels which can be dynamically assigned to different
data- path. Complex Scatter/gather transfers can be implemented by programming specific
DMA command linked lists.
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