MAX6618AUB+TG126 Datasheet MAX6618AUB+, MAX6618AUB+T, MAX6618AUB+TG126 | P13-P15

The MAX6618 SCL and SDA lines operate as both

inputs and open-drain outputs. A pullup resistor is

required on SCL and SDA.

Each transmission consists of a START condition sent

by a master, followed by the MAX6618 7-bit slave

address, plus an R/W bit, one or more data bytes, and

finally a STOP condition (Figure 6). To write to a

MAX6618 register, a write transmission consists of a

START condition, followed by the MAX6618 7-bit slave

address plus R/W = 0, a register address byte, one

data byte, and finally a STOP condition. To read from a

MAX6618 register, a combined write and read trans-

missions are required. The first write transmission con-

sists of a START condition, followed by the MAX6618

7-bit slave address plus R/W = 0, a register address

byte, and finally a STOP condition that sets the register

to be read. The second read transmission consists of a

START condition, followed by the MAX6618 7-bit slave

address plus R/W = 1, one or more data bytes, and

finally a STOP condition that reads the data from the

specified register. These write and read transmissions

can be joined using a repeated START even though the

MAX6618 7-bit slave address needs to be present pre-

ceding the R/W bits.

Start and Stop Conditions

Both SCL and SDA remain high when the interface is

not busy. A master signals the beginning of a transmis-

sion with a START (S) condition by transitioning SDA

from high to low while SCL is high. When the master

has finished communicating with the slave, it issues a

STOP (P) condition by transitioning SDA from low to

high while SCL is high. The bus is then free for another

transmission (Figure 6).

Data Transfer and Acknowledge

One data bit is transferred during each clock pulse.

The data on SDA must remain stable while SCL is high

(Figure 7).

MAX6618

PECI-to-I

C Translator

______________________________________________________________________________________ 13

SDA

SCL

START

CONDITION

STOP

CONDITION

Figure 6. Start and Stop Conditions

SDA

SCL

DATA LINE STABLE;

DATA VALID

CHANGE OF DATA

ALLOWED

Figure 7. Bit Transfer

MAX6618

The acknowledge bit is a clocked 9th bit that the recipi-

ent uses to handshake receipt of each byte of data

(Figure 8). Thus, each byte transferred effectively

requires 9 bits. The master generates the 9th clock

pulse, and the recipient pulls down SDA during the

acknowledge clock pulse so that the SDA line is stable

low during the high period of the clock pulse. When the

master is transmitting to the MAX6618, the MAX6618

generates the acknowledge bit because the MAX6618

is the recipient. When the MAX6618 is transmitting to

the master, the master generates the acknowledge bit

because the master is the recipient.

Slave Address

The MAX6618 has a 7-bit long slave address (Figure 9).

The 8th bit following the 7-bit slave address is the R/W

bit. The R/W bit is low for a write command and high for

a read command.

The first four bits of the MAX6618 slave address (A6:A3)

are always 0101. Bits A2:A1 are set during the manufac-

turing process to 0:1. A0 is selected by the address

input AD0. AD0 can be connected to GND or V

. The

MAX6618 has two possible slave addresses selectable

by AD0. Therefore, a maximum of two MAX6618 devices

can be controlled independently from the same interface

(see the

C Address Range

section).

Message Format for Writing to the MAX6618

A write to the MAX6618 consists of the transmission of

the MAX6618’s slave address with the R/W bit set to

zero, followed by at least 1 byte of information. The first

byte of information is the command byte. The com-

mand byte determines which register of the MAX6618

is to be written to by the next byte or read from during

the next read transmission. If a STOP condition is

detected after the command byte is received, then the

MAX6618 takes no further action beyond setting the

The bytes received after the command byte are data

bytes. The data bytes go into the register of the

MAX6618 specified by the command byte. Only the last

data byte or word transmitted before a STOP condition

is stored by the device (Figure 10).

PECI-to-I

C Translator

14 ______________________________________________________________________________________

01 101A0ACK0

SDA

SCL

Figure 9. Slave Address

SCL

SDA BY

TRANSMITTER

CLOCK PULSE

FOR ACKNOWLEDGEMENT

START

CONDITION

SDA BY

RECEIVER

12 89

Figure 8. Acknowledge

Message Format for Reading the MAX6618

The MAX6618 is read using the MAX6618’s internally

stored command byte as an address pointer the same

way the stored command byte is used as an address

pointer for a write. The pointer autoincrements after

each data byte is read. Thus, a read is initiated by first

configuring the MAX6618’s command byte by perform-

ing a write. The master can now read N consecutive

bytes from the MAX6618 with the first data byte being

read from the register addressed by the initialized com-

mand byte (Figure 10).

MAX6618

PECI-to-I

C Translator

______________________________________________________________________________________ 15

TYPICAL READ WORD COMMAND

PEC (PACKET ERROR CHECKSUM) ENABLED

PEC (PACKET ERROR CHECKSUM) DISABLED

MASTER

ADDR:7 W A CMD:8 A

MAX6618 ADDR:7 R A RESLO:8 A RESHI:8 A PEC:8

THE RESULT CONSISTS OF RESLO FOR THE 8 LEAST SIGNIFICANT BITS (LSBS) AND RESHI FOR THE 8 MOST SIGNIFICANT BITS (MSBS), RESULTING IN A 16-BIT WORD.

TEMPERATURE DATA AND ERROR CODES ARE GIVEN AS 16-BIT WORDS.

ADDR:7: 7-BIT ADDRESS FOLLOWED BY A READ (R = 1) OR WRITE (W = 0) BIT TO FORM THE 8-BIT ADDRESS USED IN THE I

C/SMBUS PROTOCOL.

P: I

C STOP CONDITION. SEE FIGURE 6.

S: I

C START CONDITION. SEE FIGURE 6.

A: ACK. THE PULSE ON THE 9th CLOCK CYCLE TO INDICATE ACKNOWLEDGE TRANSFER. SLAVE PULLS LOW TO GND AND MASTER PULLS TO SLAVE'S V

NA: NOT ACKNOWLEDGE

CMD: COMMAND BYTE

RESLO: LEAST SIGNIFICANT 8-BIT RESULT

RESHI: MOST SIGNIFICANT 8-BIT RESULT

MASTER

ADDR:7 W A CMD:8 A

MAX6618 ADDR:7 R A RESLO:8 A RESHI:8

TYPICAL WRITE WORD COMMAND

COMMAND WITH PEC (PACKET ERROR CHECKSUM)

COMMAND WITHOUT PEC (PACKET ERROR CHECKSUM)

MASTER

ADDR:7 W A CMD:8 A

MASTER

INLO:8 A INHI:8 A

INHI:8 A P

PEC:8 A

ADDR:7 W A CMD:8 A INLO:8 A

Figure 10. Typical Read/Write Word Command

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P17

MAX6618AUB+TG126

Mfr. #:

Buy MAX6618AUB+TG126

Manufacturer:

Maxim Integrated

Description:

Interface - Specialized PECI-to-I2C Translator

Lifecycle:

New from this manufacturer.

Delivery:

DHL FedEx Ups TNT EMS

Payment:

T/T Paypal Visa MoneyGram Western Union

MAX6618AUB+TG126

MAX6618AUB+TG126

Products related to this Datasheet