CAT5419
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Table 4. POTENTIOMETER CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.)
Symbol
Parameter Test Conditions Min Typ Max Units
R
POT
Potentiometer Resistance (00) 100
kW
R
POT
Potentiometer Resistance (50) 50
kW
R
POT
Potentiometer Resistance (10) 10
kW
R
POT
Potentiometer Resistance (25) 2.5
kW
Potentiometer Resistance Tolerance 20 %
R
POT
Matching 1 %
Power Rating 25C, each pot 50 mW
I
W
Wiper Current 6 mA
R
W
Wiper Resistance I
W
= 3 mA @ V
CC
= 3 V 300
W
R
W
Wiper Resistance I
W
= 3 mA @ V
CC
= 5 V 80 150
W
V
TERM
Voltage on any R
H
or R
L
Pin V
SS
= 0 V GND V
CC
V
V
N
Noise (Note 3) TBD nV/Hz
Resolution 1.6 %
Absolute Linearity (Note 4) R
W(n)(actual)
R
(n)(expected)
(Note 7)
1 LSB
(Note 6)
Relative Linearity (Note 5) R
W(n+1)
[R
W(n)+LSB
]
(Note 7)
0.2 LSB
(Note 6)
TC
RPOT
Temperature Coefficient of R
POT
(Note 3) 300 ppm/C
TC
RATIO
Ratiometric Temp. Coefficient (Note 3) 20 ppm/C
C
H
/C
L
/C
W
Potentiometer Capacitances (Note 3) 10/10/25 pF
fc Frequency Response
R
POT
= 50 kW (Note 3)
0.4 MHz
3. This parameter is tested initially and after a design or process change that affects the parameter.
4. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage as determined by wiper position when used as a
potentiometer.
5. Relative linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a potentiometer.
It is a measure of the error in step size.
6. LSB = R
TOT
/ 63 or (R
H
R
L
) / 63, single pot
7. n = 0, 1, 2, ..., 63
Table 5. D.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.)
Symbol
Parameter Test Conditions Min Max Units
I
CC
Power Supply Current f
SCL
= 400 kHz 1 mA
I
SB
Standby Current (V
CC
= 5 V) V
IN
= GND or V
CC
; SDA Open 1
mA
I
LI
Input Leakage Current V
IN
= GND to V
CC
10
mA
I
LO
Output Leakage Current V
OUT
= GND to V
CC
10
mA
V
IL
Input Low Voltage 1 V
CC
x 0.3 V
V
IH
Input High Voltage V
CC
x 0.7 V
CC
+ 1.0 V
V
OL1
Output Low Voltage (V
CC
= 3 V) I
OL
= 3 mA 0.4 V
Table 6. PIN CAPACITANCE (Note 8)
(Applicable over recommended operating range from T
A
= 25C, f = 1.0 MHz, V
CC
= +5.0 V (unless otherwise noted).)
Symbol
Test Conditions Min Typ Max Units Conditions
C
I/O
Output Capacitance (SDA) 8 pF V
I/O
= 0 V
C
IN
Input Capacitance (A0, A1, A2, A3, SCL, WP) 6 pF V
IN
= 0 V
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Table 7. A.C. CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.)
Symbol
Parameter Min Typ Max Units
f
SCL
Clock Frequency 400 kHz
T
I
(Note 8) Noise Suppression Time Constant at SCL, SDA Inputs 50 ns
t
AA
SLC Low to SDA Data Out and ACK Out 0.9
ms
t
BUF
(Note 8) Time the bus must be free before a new transmission can start 1.2
ms
t
HD:STA
Start Condition Hold Time 0.6
ms
t
LOW
Clock Low Period 1.2
ms
t
HIGH
Clock High Period 0.6
ms
t
SU:STA
Start Condition Setup Time (for a Repeated Start Condition) 0.6
ms
t
HD:DAT
Data in Hold Time 0 ns
t
SU:DAT
Data in Setup Time 100 ns
t
R
(Note 8) SDA and SCL Rise Time 0.3
ms
t
F
(Note 8) SDA and SCL Fall Time 300 ns
t
SU:STO
Stop Condition Setup Time 0.6
ms
t
DH
Data Out Hold Time 50 ns
Table 8. POWER UP TIMING (Note 8) (Over recommended operating conditions unless otherwise stated.)
Symbol Parameter Min Typ Max Units
t
PUR
Power-up to Read Operation 1 ms
t
PUW
Power-up to Write Operation 1 ms
8. This parameter is tested initially and after a design or process change that affects the parameter.
Table 9. WRITE CYCLES LIMITS (Note 9)
Symbol
Parameter Max Units
t
WR
Write Cycle Time 5 ms
9. The write cycle is the time from a valid stop condition of a write sequence to the end of the internal program/erase cycle. During the write
cycle, the bus interface circuits are disabled, SDA is allowed to remain high, and the device does not respond to its slave address.
Table 10. RELIABILITY CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.)
Symbol
Parameter Reference Test Method Min Typ Max Units
N
END
(Note 10) Endurance MILSTD883, Test Method 1033 1,000,000 Cycles/Byte
T
DR
(Note 10) Data Retention MILSTD883, Test Method 1008 100 Years
V
ZAP
(Note 10) ESD Susceptibility MILSTD883, Test Method 3015 2,000 Volts
I
LTH
(Notes 10, 11) Latch-up JEDEC Standard 17 100 mA
10.This parameter is tested initially and after a design or process change that affects the parameter.
11. t
PUR
and t
PUW
are the delays required from the time V
CC
is stable until the specified operation can be initiated.
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Figure 2. Bus Timing
SCL
SDA IN
SDA OUT
STOP
CONDITION
START
CONDITION
ADDRESS
ACK
8TH BIT
BYTE n
SCL
SDA
Figure 3. Write Cycle Timing
Figure 4. Start/Stop Timing
START BIT
SDA
STOP BIT
SCL
t
WR
t
SU:STA
t
AA
t
HD:STA
t
HD:DAT
t
LOW
t
F
t
DH
t
LOW
t
R
t
SU:DAT
t
HIGH
t
SU:STO
t
BUF

CAT5419YI-10-T2

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Digital Potentiometer ICs DPP,NV,Dual 64 taps I2C
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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