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SCH5027D-NW
P1-P3
P4-P6
P7-P9
P10-P10
SCH5027D-NW
DS00001782A-page 4
2014 Microchip Technology Inc.
BLOCK DIAGRAM
FIGURE 1:
SCH5027D-NW BLOCK DIAGRAM
LEDs
LED2*
LED1*
Internal Bus
(Data, Address, and
Control lines)
Power Mgmt
IO_PME_S5*
IO_SMI*
GP1
[0:4]
*, G
P21*,
GP22
*
GP27*
, G
P32*,
GP33*
GP36*
, GP37
* , GP4
[0,2,
3]*
GP5[0
:1]*, GP
6[0:1]*
Note 1:
This dia
gram does not show power and grou
nd
connections.
Note 2:
Signa
l names followe
d by an asterisk
(*) are
located on mu
ltifunction pins
. This diag
ram is designed
to
show the vario
us functions availa
ble on the chip
and
should not
be used as
a pin layout
.
CLOCK
GEN
CLK32
CLOCKI
WDT
32 byte
Security
Key
Register
nDSR1, nDTR1
nDCD1, nRI1
Power Control
and Recovery
`
SLP_S3#, SLP_S5#
PWRGD_CPU ,
PWRGD_3V
SLP_S3DEL#
PS_ON
nRSMRST
nFPRST, PB_IN#
PWRGD_PS
nHWM_
INT
Vref
PECI
READY
VID3/PWMA
VID4/PWMB
VID5 / FANTACH3
V1_IN
V2_IN
VCCP_IN
+2.5VTR_IN
Remot
e1-
Remot
e1+
Remot
e2-
Remot
e2+
PWM1/xTest Out
PWM2
PWM3/
ADDR_
EN#
FANTACH1
FANTACH2
FANTA
CH4
/ ADDR_
SEL
PWMA*, PWMB*
FANTAC
HA*
FANTAC
HB*
S
M
b
u
s
SDA
SCLK
Hardware
Monitor
Gener
al
Purpose
I/O
IO_PME
_S3*
VCC
VTR
Vbat
SLP_S3#
SLP_S5#
HWN_IN
T
14.31
8Mhz
96 Mh
z
PCI_RESET#
WDT*
SER_IRQ
LAD[3:0]
LFrame#
LDRQ#
PCI_RESET#
PCI_CLK
LPC
Bus Interface
SERIAL
IRQ
SMbus
Isola
-
tion
Switch
SDA1
SCLK1
SDA2
SCLK2
Prop
rietar
y
82077
Compatible
Floppydisk
Controller with
Digit
al Dat
a
Separator &
Write Precom-
pensation
nRDATA, nWDATA
nDIR, n
STEP
nMTR0, nTRK0, InNDEX
DRVDEN0*, nWRTPRT
nWGATE
, nHDS
EL
nDSKCHG, nDS0,
High-Speed
16550A
UART
PORT 1
TXD1*, RXD1
nCTS1, nRTS1*
Multi-Mode
Parallel Port
with
ChiProtect
TM
/
FDC MUX
(see
LPC47B27
x)
PD[7,0]
BUSY, SLCT, PE,
nERROR, nACK
nSTROB
E, nINI
T,
nSLCTIN, nALF
Intruder
Detection
nINT
RD_IN
Keyboard/Mouse
8042
controller
KCLK*
, KDAT
*
MCLK*, MDAT*
A20M*
nKBDRST
*
PCI Reset
Outputs
nPCIRST_OUT[1:4]*
nIDE_RSTDRV*
High-Speed
16550A
UART
PORT 2
TXD2 (IRTX)*,
RXD2 (IRRX)*
DSR2*, D
TR2*
DCD2
*, RI2
*
CTS2*, RTS2 *
2014 Microchip Technology Inc.
DS00001782A-page 5
SCH5027D-NW
PACKAGE OUTLINE
FIGURE 2:
128-PIN QFP PACKAGE, 14MM
X 20MM X 2.7MM BODY
, 3.2MM FOOTPRINT
Note: For the most current package drawings,
see the Microchip Packaging Specification at
http://www.microchip.com/packaging
SCH5027D-NW
DS00001782A-page 6
2014 Microchip Technology Inc.
APPENDIX A:
PRODUCT BRIEF REVISION HISTORY
T
ABLE A-1:
REVISION HISTORY
Revision
Section/Figure/Entry
Correction
DS00001782A (07-02-14)
Replaces previo
us version Rev
. 0.3
6 (06-08-07)
P1-P3
P4-P6
P7-P9
P10-P10
SCH5027D-NW
Mfr. #:
Buy SCH5027D-NW
Manufacturer:
Microchip Technology
Description:
I/O Controller Interface IC Super I/O
Lifecycle:
New from this manufacturer.
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SCH5027D-NW