ICE1QS01
Version 1.4 7 27 Apr 2004
Soft start
The internal reference of the IC is switched on when V
CC
exceeds the V
CCon
threshold. The IC
begins to work with soft start mode. Soft start is realized with an internal soft start resistor, an inter-
nal current sink, a current source and the external feedback capacitor connected at pin SRC. The
internal resistor is connected between the internal voltage reference and pin SRC. The current sink
is connected between pin SRC and GND. The value of the current is set with a timer. Immediately
after the IC is switched on the capacitor C
SRC
is charged with a current source up to 2.5V. This cur-
rent source is switched off 12 µsec after beginning of soft start. The current value of the current sink
is set with a timer. Every three msec the current of the current sink is reduced and so V
SRC
can
increase stepwise. The soft start is finished 24 msec after the IC is switched on. At the end of the
soft start the current sink is switched off.
Figure: Soft Start
PCS (primary current simulation)
A voltage proportional to the current of the power transistor is generated at Pin PCS by the RC-com-
bination R2, C2. The voltage at Pin PCS is forced to 1.5V when the power transistor is switched off
and during its switch on time C2 is charged by R2 from the rectified mains. The relation of V
PCS
and
ton tp1 tp2
VCCon
VSRC1
VSRC2
VSRC
VCC
t
t
20k
pin SRC
current
sink
up
down
counter
D/A
timer
tp=3ms
2.5V
ICE1QS01
timer
t=12us
500
5V
timer
t=24ms
ICE1QS01
Version 1.4 8 27 Apr 2004
the current in the power transistor (Iprimary) is:
Lprimary: Primary inductance of the transformer
The advantage of primary current simulation is the elimination of the leading edge spike, which is
generated when the power transistor is switched on.
RZI (zero crossing input and primary regulation)
Zero current counter
Every time when the falling voltage ramp of V
RZI
crosses the 50 mV threshold a pulse is sent to the
zero-current-counter and increases the counter by one. If zero-current-counter and up-down-coun-
ter are equal the gate drive OUT is switched to high. Up-down counter is influenced via SRC voltage
as described below. If V
RZI
is greater than 50 mV gate drive OUT is always switched low.
Figure: Zero Crossing Switching Behaviour
VPCS 15V,
Lprimary Iprimary×
R2 C2×
--------------------------------------------------------+=
VRZI
OUT
ton tof f ton tof f
VPCS
VSRC
V
t
t
t
status up- down
counter = 0001:
switch on at first
zero crossing
status up-down
counter = 0010:
switch on at second
zero crossing
1.5V
ICE1QS01
Version 1.4 9 27 Apr 2004
Ringing suppression
When V
PCS
reaches the feedback voltage V
SRC
the gate drive OUT is set to low and the ringing
suppression timer is started. This timer ensures that the gate drive cannot be switched on until this
ringing suppression time is passed. Duration of ringing suppression time depends on the V
RZI
volt-
age. Suppression time is 3 µsec if V
RZI
> 1V and it is 30 µsec if V
RZI
< 1V.
Figure: Ringing Suppression
VRZI
OUT
ringing
suppression
time
1V
30 us
3 µs
up-down-counter
=1
up-down-counter
=1
VSRC
VPCS
1.5V

ICE1QS01G

Mfr. #:
Manufacturer:
Infineon Technologies
Description:
IC PFC CONTROLLER 8DSO
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet