ISL59115IRUZ-T7

7
FN6185.2
September 21, 2006
FIGURE 17. GROUP DELAY vs FREQUENCY
FIGURE 18. -3dB BANDWIDTH vs INPUT RESISTANCE
FIGURE 19. SLEW RATE vs SUPPLY VOLTAGE
FIGURE 20. UNWEIGHTED NOISE FLOOR
Typical Performance Curves (Continued)
V
DD
= +3.3V
R
L
= 150
80 140 200 260 320 380 440 500
16
14
12
10
8
6
4
2
-3dB BANDWIDTH (MHz)
INPUT RESISTANCE ()
V
DD
= +3.3V
R
L
= 150
2.0 2.5 3.0 3.5 4.0
44
43
42
41
40
39
38
37
SLEW RATE (V/µs)
SUPPLY VOLTAGE (V)
V
out
= 2V
P-P
R
L
= 150
NEGATIVE SLEW RATE
POSITIVE SLEW RATE
24681246812 4
10kHz 100kHz 1MHz 4.2MHz
10
100
FREQUENCY (Hz)
NOISE FLOOR
nV/ Hz
ISL59115
8
FN6185.2
September 21, 2006
Application Information
The ISL59115 is a single-supply rail-to-rail triple (one s-video
channel and one composite channel) video amplifier with
internal sync tip clamps, a typical -3dB bandwidth of 9MHz
and slew rate of about 40V/µs. This part is ideally suited for
applications requiring high composite and s-video
performance with very low power consumption. As the
performance characteristics and features illustrate, the
ISL59115 is optimized for portable video applications.
Internal Sync Clamp
Embedded video DACs typically use ground as their most
negative supply. This places the sync tip voltage at a
minimum of 0V. Presenting a 0V input to most single supply
amplifiers will saturate the output stage of the amplifier
resulting in a clipped sync tip and degraded video image.
The ISL59115 features an internal sync clamp and offset
function that level shifts the entire video signal to the
optimum level before it reaches the amplifiers’ input stage.
These features also help avoid saturation of the output stage
of the amplifier by setting the signal closer to the best
voltage range.
The simplified block diagram on the front page shows the
basic operation of the ISL59115’s sync clamp. The Y and
CVBS inputs’ AC-coupled video sync signal is pulled
negative by a current source at the input. When the sync tip
goes below the comparator threshold, the comparator output
goes high, pulling up on the input through the diode, forcing
current into the coupling capacitor until the voltage at the
input is again 0V, and the comparator turns off. This forces
the sync tip clamp to always be 0V, setting the offset for the
entire video signal. The C channel is slaved to the Y channel
and clamped to a 500mV level.
The Sallen Key Low Pass Filter
The Sallen Key is a classic low pass configuration. This
provides a very stable low pass function, and in the case of
the ISL59115, a three-pole roll-off at 9MHz. The three-pole
function is accomplished with an RC low pass network placed
in series with and before the Sallen Key. One pole provided by
the RC network and poles two and three provided by the
Sallen Key for a nice three-pole roll-off at 9MHz.
Output Coupling
The ISL59115 can be AC or DC coupled to its output. When
AC coupling, a 220µF coupling capacitor is recommended to
ensure that low frequencies are passed, preventing video
“tilt” or “droop” across a line.
The ISL59115’s internal sync clamp makes it possible to DC
couple the output to a video load, eliminating the need for
any AC coupling capacitors, saving board space, cost, and
eliminating any “tilt” or offset shift in the output signal. The
trade off is larger supply current draw, since the DC
component of the signal is now dissipated in the load
resistor. Typical load current for AC coupled signals is 5mA
compared to 10mA for DC coupling.
Output Drive Capability
The ISL59115 does not have internal short circuit protection
circuitry. If the output is shorted indefinitely, the power
dissipation could easily overheat the die or the current could
eventually compromise metal integrity. Maximum reliability is
maintained if the output current never exceeds ±40mA. This
limit is set by the design of the internal metal interconnect.
Note that for transient short circuits, the part is robust.
Short circuit protection can be provided externally with a
back match resistor in series with the output placed close as
possible to the output pin. In video applications this would be
a 75 resistor and will provide adequate short circuit
protection to the device. Care should still be taken not to
stress the device with a short at the output.
FIGURE 21. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 22. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
Typical Performance Curves (Continued)
JEDEC JESD51-3 AND SEMI G42-88
(SINGLE LAYER) TEST BOARD
0.8
0.7
0.5
0.3
0.2
0.1
0
0 255075100 150
AMBIENT TEMPERATURE (°C)
POWER DISSIPATION (W)
12585
0.6
0.4
J
A
=
1
9
4
°
C
/
W
µ
TQ
FN
1
0
515mW
JEDEC JESD51-7 HIGH EFFECTIVE
THERMAL CONDUCTIVITY TEST BOARD -
QFN EXPOSED DIEPAD SOLDERED TO
PCB PER JESD51-5
3
2.5
2
1.5
1
0.5
0
0 255075100 150
AMBIENT TEMPERATURE (°C)
POWER DISSIPATION (W)
775mW
J
A
=
1
2
9
°
C
/
W
µ
T
Q
F
N
1
0
12585
ISL59115
9
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6185.2
September 21, 2006
Power Dissipation
With the high output drive capability of the ISL59115, it is
possible to exceed the +125°C absolute maximum junction
temperature under certain load current conditions.
Therefore, it is important to calculate the maximum junction
temperature for an application to determine if load conditions
or package types need to be modified to assure operation of
the amplifier in a safe operating area.
The maximum power dissipation allowed in a package is
determined according to:
Where:
T
JMAX
= Maximum junction temperature
T
AMAX
= Maximum ambient temperature
JA
= Thermal resistance of the package
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
for sourcing:
for sinking:
Where:
V
S
= Supply voltage
I
SMAX
= Maximum quiescent supply current
V
OUT
= Maximum output voltage of the application
R
LOAD
= Load resistance tied to ground
I
LOAD
= Load current
Power Supply Bypassing Printed Circuit Board
Layout
As with any modern operational amplifier, a good printed
circuit board layout is necessary for optimum performance.
Lead lengths should be as short as possible. The power
supply pin must be well bypassed to reduce the risk of
oscillation. For normal single supply operation, a single
4.7µF tantalum capacitor in parallel with a 0.1µF ceramic
capacitor from V
S
+ to GND will suffice.
Printed Circuit Board Layout
For good AC performance, parasitic capacitance should be
kept to minimum. Use of wire wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance that can result in
compromised performance.
PD
MAX
T
JMAX
T
AMAX
JA
---------------------------------------------
=
PD
MAX
V
S
I
SMAX
V
S
V
OUT
+
V
OUT
R
L
----------------
=
PD
MAX
V
S
I
SMAX
V
OUT
V
S
+ I
LOAD
=
ISL59115

ISL59115IRUZ-T7

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Video Amplifiers ISL62884C EVALRD 2 2 8LD RHS COMPLIA
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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