LTC3499/LTC3499B
11
3499fc
APPLICATIONS INFORMATION
The ESL (equivalent series inductance) is also an important
factor for high frequency converters. Using small surface
mount ceramic capacitors, placed as close as possible to
V
OUT
, will minimize ESL.
Low ESR capacitors should be used to minimize output
voltage ripple. A 4.7µF to 10µF output capacitor is suf-
ficient for most applications and should be placed as close
to V
OUT
as possible. Larger values may be used to obtain
even lower output ripple and improve transient response.
X5R and X7R dielectric materials are preferred for their
ability to maintain capacitance over wide voltage and
temperature ranges.
Input Capacitor Selection
The input filter capacitor reduces peak currents drawn
from the input source and reduces input switching noise.
Ceramic capacitors are a good choice for input decoupling
due to their low ESR and ability to withstand reverse voltage
(i.e. non-polar nature). The capacitor should be located
as close as possible to the device. In most applications a
2.2µF input capacitor is sufficient. Larger values may be
used without limitations. Table 2 shows a list of several
ceramic capacitor manufacturers.
Table 2. Capacitor Vendor Information
SUPPLIER WEB SITE
AVX www.avxcorp.com
Murata www.murata.com
TDK www.component.tdk.com
Taiyo Yuden www.t-yuden.com
Thermal Considerations
For the LTC3499/LTC3499B to deliver full output power, it
is imperative that a good thermal path be provided to dis-
sipate the heat generated within the package. For the DFN
package, this can be accomplished by taking advantage
of the large thermal pad on the underside of the device.
It is recommended that multiple vias in the printed circuit
board be used to conduct heat away from the part and
into a copper plane with as much area as possible. If the
junction temperature continues to rise, the part will go
into thermal shutdown where switching will stop until the
temperature drops.
Closing the Feedback Loop
The LTC3499/LTC3499B utilize current mode control,
with internal slope compensation. Current mode control
eliminates the 2nd order filter due to the inductor and out-
put capacitor exhibited in voltage mode controllers, thus
simplifying it to a single pole filter response. The product
of the modulator control to output DC gain and the error
amp open loop gain gives the DC gain of the system:
G
DC
= G
CONTROL
• G
EA
•
V
REF
V
OUT
• G
CURRENT _ SENSE
G
CONTROL
= 2 •
V
IN
I
OUT
,
G
EA
≈ 1000, G
CURRENT _ SENSE
=
1
R
DS ON
( )
The output filter pole is given by:
f
FILTER _POLE
=
I
OUT
π • V
OUT
• C
OUT
( )
where C
OUT
is the output filter capacitor.
The output filter zero is given by:
f
FILTER _ ZERO
=
1
2 • π • R
ESR
• C
OUT
( )
where R
ESR
is the capacitor equivalent series resistance.
A troublesome feature of the boost regulator topology is
the right half plane (RHP) zero, given by:
f
RHPZ
=
V
IN
2
2 • π • I
OUT
• V
OUT
• L
( )
