AD704
Rev. E | Page 6 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
T
A
= 25°C, V
S
= ±15 V dc, unless otherwise noted.
50
40
30
20
10
0
–80 –40 0 40 80
INPUT OFFSET VOLTAGE (µV)
UNITS (%)
00818-007
Figure 7. Typical Distribution of Input Offset Voltage
50
40
30
20
10
0
–160 –80 0 80 160
INPUT BIAS CURRENT (pA)
UNITS (%)
00818-008
Figure 8. Typical Distribution of Input Bias Current
50
40
30
20
10
0
–120 –60 0 60 120
INPUT OFFSET CURRENT (pA)
UNITS (%)
00818-009
Figure 9. Typical Distribution of Input Offset Current
+V
S
–0.5
–1.0
–1.5
+1.5
+1.0
+0.5
–V
S
0 5 10 15 20
SUPPLY VOLTAGE (V)
INPUT COMMON-MODE VOLTAGE LIMIT –V
(REFERRED TO SUPPLY VOLTAGES)
00818-010
Figure 10. Input Common-Mode Voltage Range vs. Supply Voltage
35
30
25
20
15
10
5
0
1k 10k 100k 1M
FREQUENCY (Hz)
OUTPUT VOLTAGE (V p-p)
00818-011
Figure 11. Large Signal Frequency Response
100
10
1
0.1
1k 10k 100k 1M 10M 100M
SOURCE RESISTANCE (Ω)
OUTPUT VOLTAGE DRIFT (µV/°C)
SOURCE RESISTANCE MAY BE EITHER
BALANCED OR UNBALANCED.
00818-012
Figure 12. Offset Voltage Drift vs. Source Resistance
