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74HC245N,652
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P22
9397 750 14502
© Koninklijk
e Philips Electronics N.V
. 2005. All rights reserved.
Product data sheet
Rev
. 03 — 31 January 2005
13 of 22
Philips Semiconductors
74HC245; 74HCT245
Octal bus tranceiver; 3-state
12.
W
avef
orms
Measurement points are given in
T
ab
le 11
.
V
OL
and V
OH
are typical voltage output drop that occur with the output load.
Fig 5.
Input (An, Bn) to output (Bn, An) propa
gation delays and output transition times
Measurement points are given in
T
ab
le 11
.
V
OL
and V
OH
are typical voltage output drop that occur with the output load.
Fig 6.
3-state output enable and disable times
T
able 11:
Measurement points
T
ype
Input
Output
V
M
V
M
74HC245
0.5V
CC
0.5V
CC
74HCT245
1.3 V
1.3 V
001aac433
t
PLH
t
PHL
V
M
V
M
90 %
10 %
V
M
V
M
Bn, An output
An, Bn input
V
I
GND
V
OH
V
OL
t
TLH
t
THL
001aac479
t
PLZ
t
PHZ
outputs
disabled
outputs
enabled
90 %
10 %
outputs
enabled
OE input
V
I
V
CC
V
OL
V
OH
GND
GND
V
M
t
PZL
t
PZH
V
M
V
M
output
LOW
-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
t
r
t
f
90 %
10 %
9397 750 14502
© Koninklijk
e Philips Electronics N.V
. 2005. All rights reserved.
Product data sheet
Rev
. 03 — 31 January 2005
14 of 22
Philips Semiconductors
74HC245; 74HCT245
Octal bus tranceiver; 3-state
T
est data is given in
T
able 12
.
Definitions test circuit:
R
T
= T
er
mination resistance should be equal to output impedance Z
o
of the pulse generator
.
C
L
= Load capacitance including jig and probe capacitance.
R
L
= Load resistor
.
Fig 7.
Load circuitry f
or switching times
T
able 12:
T
est data
T
ype
Input
T
est
V
I
t
r
, t
f
t
PHL
, t
PLH
t
PZH
, t
PHZ
t
PZL
, t
PLZ
74HC245
V
CC
6 ns
open
GND
V
CC
74HCT245
3 V
6 ns
open
GND
V
CC
mgk563
D.
U
.
T
V
CC
V
CC
V
I
V
O
R
T
R
L
= 1 k
Ω
C
L
50 pF
open
PULSE
GENERA
TOR
9397 750 14502
© Koninklijk
e Philips Electronics N.V
. 2005. All rights reserved.
Product data sheet
Rev
. 03 — 31 January 2005
15 of 22
Philips Semiconductors
74HC245; 74HCT245
Octal bus tranceiver; 3-state
13.
P
ackage outline
Fig 8.
P
acka
ge outline SOT146-1 (DIP20)
UNIT
A
max.
1
2
b
1
cD
E
e
M
H
L
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
mm
inches
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
SOT146-1
99-12-27
03-02-13
A
min.
A
max.
b
Z
max.
w
M
E
e
1
1.73
1.30
0.53
0.38
0.36
0.23
26.92
26.54
6.40
6.22
3.60
3.05
0.254
2.54
7.62
8.25
7.80
10.0
8.3
2
4.2
0.51
3.2
0.068
0.051
0.021
0.015
0.014
0.009
1.060
1.045
0.25
0.24
0.14
0.12
0.01
0.1
0.3
0.32
0.31
0.39
0.33
0.078
0.17
0.02
0.13
SC-603
MS-001
M
H
c
(e )
1
M
E
A
L
seating plane
A
1
w
M
b
1
e
D
A
2
Z
20
1
11
10
b
E
pin 1 index
0
5
10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
(1)
(1)
(1)
DIP20: plastic dual in-line package; 20 leads (300 mil)
SOT146-1
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P22
74HC245N,652
Mfr. #:
Buy 74HC245N,652
Manufacturer:
NXP Semiconductors
Description:
Bus Transceivers OCTAL BUS TXRX 3ST
Lifecycle:
New from this manufacturer.
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Products related to this Datasheet
74HC245N,652
74HCT245N,652