16
LT1959
APPLICATIONS INFORMATION
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PARASITIC RESONANCE
Resonance or “ringing” may sometimes be seen on the
switch node (see Figure 7). Very high frequency ringing
following switch rise time is caused by switch/diode/input
capacitor lead inductance and diode capacitance. Schot-
tky diodes have very high “Q” junction capacitance that
can ring for many cycles when excited at high frequency.
If total lead length for the input capacitor, diode and switch
path is 1 inch, the inductance will be approximately 25nH.
At switch off, this will produce a spike across the NPN
output device in addition to the input voltage. At higher
currents this spike can be in the order of 10V to 20V or
higher with a poor layout, potentially exceeding the abso-
lute max switch voltage. The path around switch, catch
diode and input capacitor must be kept as short as
possible to ensure reliable operation. When looking at this,
a >100MHz oscilloscope must be used, and waveforms
should be observed on the leads of the package. This
switch off spike will also cause the SW node to go below
ground. The LT1959 has special circuitry inside which
RISE AND FALL
WAVEFORMS ARE
SUPERIMPOSED
(PULSE WIDTH IS
NOT
120ns)
5V/DIV
Figure 7. Switch Node Resonance
20ns/DIV 1375/76 F07
INDUCTOR
CURRENT
20ns/DIV 1375/76 F11
0.5µs/DIV 1375/76 F08
Figure 8. Discontinuous Mode Ringing
5V/DIV
100mA/DIV
SWITCH NODE
VOLTAGE
mitigates this problem, but negative voltages over 1V
lasting longer than 10ns should be avoided. Note that
100MHz oscilloscopes are barely fast enough to see the
details of the falling edge overshoot in Figure 7.
A second, much lower frequency ringing is seen during
switch off time if load current is low enough to allow the
inductor current to fall to zero during part of the switch off
time (see Figure 8). Switch and diode capacitance reso-
nate with the inductor to form damped ringing at 1MHz to
10 MHz. This ringing is not harmful to the regulator and it
has not been shown to contribute significantly to EMI. Any
attempt to damp it with a resistive snubber will degrade
efficiency.
INPUT BYPASSING AND VOLTAGE RANGE
Input Bypass Capacitor
Step-down converters draw current from the input supply
in pulses. The average height of these pulses is equal to
load current, and the duty cycle is equal to V
OUT
/V
IN
. Rise
and fall time of the current is very fast. A local bypass
capacitor across the input supply is necessary to ensure
proper operation of the regulator and minimize the ripple
current fed back into the input supply.
The capacitor also
forces switching current to flow in a tight local loop,
minimizing EMI
.
Do not cheat on the ripple current rating of the Input
bypass capacitor, but also don’t get hung up on the value
in microfarads
. The input capacitor is intended to absorb
all the switching current ripple, which can have an RMS
value as high as one half of load current. Ripple current
ratings on the capacitor must be observed to ensure
reliable operation. In many cases it is necessary to parallel
two capacitors to obtain the required ripple rating. Both
capacitors must be of the same value and manufacturer to
guarantee power sharing. The actual value of the capacitor
in microfarads is not particularly important because at
500kHz, any value above 5µF is essentially resistive. RMS
ripple current rating is the critical parameter. Actual RMS
current can be calculated from:
IIVVVV
RIPPLE RMS OUT OUT IN OUT IN
(
)
=−
()
/
2
17
LT1959
APPLICATIONS INFORMATION
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The term inside the radical has a maximum value of 0.5
when input voltage is twice output, and stays near 0.5 for
a relatively wide range of input voltages. It is common
practice therefore to simply use the worst-case value and
assume that RMS ripple current is one half of load current.
At maximum output current of 4.5A for the LT1959, the
input bypass capacitor should be rated at 2.25A ripple
current. Note however, that there are many secondary
considerations in choosing the final ripple current rating.
These include ambient temperature, average versus peak
load current, equipment operating schedule, and required
product lifetime. For more details, see Application Notes
19 and 46, and Design Note 95.
Input Capacitor Type
Some caution must be used when selecting the type of
capacitor used at the input to regulators. Aluminum
electrolytics are lowest cost, but are physically large to
achieve adequate ripple current rating, and size con-
straints (especially height), may preclude their use.
Ceramic capacitors are now available in larger values, and
their high ripple current and voltage rating make them
ideal for input bypassing. Cost is fairly high and footprint
may also be somewhat large. Solid tantalum capacitors
would be a good choice, except that they have a history of
occasional spectacular failures when they are subjected to
large current surges during power-up. The capacitors can
short and then burn with a brilliant white light and lots of
nasty smoke. This phenomenon occurs in only a small
percentage of units, but it has led some OEM companies
to forbid their use in high surge applications. The input
bypass capacitor of regulators can see these high surges
when a battery or high capacitance source is connected.
Several manufacturers have developed a line of solid
tantalum capacitors specially tested for surge capability
(AVX TPS series for instance, see Table 3), but even these
units may fail if the input voltage surge approaches the
maximum voltage rating of the capacitor. AVX recom-
mends derating capacitor voltage by 2:1 for high surge
applications.
Larger capacitors may be necessary when the input volt-
age is very close to the minimum specified on the data
sheet. Small voltage dips during switch on time are not
normally a problem, but at very low input voltage they may
cause erratic operation because the input voltage drops
below the minimum specification. Problems can also
occur if the input-to-output voltage differential is near
minimum. The amplitude of these dips is normally a
function of capacitor ESR and ESL because the capacitive
reactance is small compared to these terms. ESR tends to
be the dominate term and is inversely related to physical
capacitor size within a given capacitor type.
SYNCHRONIZING
The SYNC pin, is used to synchronize the internal oscilla-
tor to an external signal. The SYNC input must pass from
a logic level low, through the maximum synchronization
threshold with a duty cycle between 10% and 90%. The
input can be driven directly from a logic level output. The
synchronizing range is equal to
initial
operating frequency
up to 1MHz. This means that
minimum
practical sync
frequency is equal to the worst-case
high
self-oscillating
frequency (560kHz), not the typical operating frequency of
500kHz. Caution should be used when synchronizing
above 700kHz because at higher sync frequencies the
amplitude of the internal slope compensation used to
prevent subharmonic switching is reduced. This type of
subharmonic switching only occurs at input voltages less
than twice output voltage. Higher inductor values will tend
to eliminate this problem. See Frequency Compensation
section for a discussion of an entirely different cause of
subharmonic switching before assuming that the cause is
insufficient slope compensation. Application Note 19 has
more details on the theory of slope compensation.
At power-up, when V
C
is being clamped by the FB pin (see
Figure 2, Q2), the sync function is disabled. This allows the
frequency foldback to operate in the shorted output con-
dition. During normal operation, switching frequency is
controlled by the internal oscillator until the FB pin reaches
0.7V, after which the SYNC pin becomes operational.
THERMAL CALCULATIONS
Power dissipation in the LT1959 chip comes from four
sources: switch DC loss, switch AC loss, boost circuit
current, and input quiescent current. The following
18
LT1959
APPLICATIONS INFORMATION
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formulas show how to calculate each of these losses.
These formulas assume continuous mode operation, so
they should not be used for calculating efficiency at light
load currents.
Switch loss:
P
RI V
V
ns I V f
SW
SW OUT OUT
IN
OUT IN
=
()( )
+
()()()
2
24
Boost current loss:
P
VI
V
BOOST
OUT OUT
IN
=
()
2
50/
Quiescent current loss:
PV V
V
V
Q IN OUT
OUT
IN
=
()
+
()
+
()
0 001 0 005
0 002
2
..
.
R
SW
= Switch resistance (0.07)
24ns = Equivalent switch current/voltage overlap time
f = Switch frequency
Example: with V
IN
= 10V, V
OUT
= 5V and I
OUT
= 3A:
P
W
PW
PW
SW
BOOST
Q
=
( )()()
+
()( )
=+=
=
()( )
=
=
()
+
()
+
()( )
=
007 3 5
10
24 10 3 10 500 10
0 32 0 36 0 68
5350
10
015
10 0 001 5 0 005
5 0 002
10
004
2
93
2
2
.
••
...
/
.
..
.
.
Total power dissipation is 0.68 + 0.15 + 0.04 = 0.87W.
Thermal resistance for LT1959 package is influenced by
the presence of internal or backside planes. With a full
plane under the SO package, thermal resistance will be
about 80°C/W. No plane will increase resistance to about
120°C/W. To calculate die temperature, use the proper
thermal resistance number for the desired package and
add in worst-case ambient temperature:
T
J
= T
A
+ θ
JA
(P
TOT
)
With the SO-8 package (θ
JA
= 80°C/W), at an ambient
temperature of 50°C,
T
J
= 50 + 80 (0.87) = 120°C
Die temperature is highest at low input voltage, so use
lowest continuous input operating voltage for thermal
calculations.
FREQUENCY COMPENSATION
Loop frequency compensation of switching regulators
can be a rather complicated problem because the reactive
components used to achieve high efficiency also
introduce multiple poles into the feedback loop. The
inductor and output capacitor on a conventional step-
down converter actually form a resonant tank circuit that
can exhibit peaking and a rapid 180° phase shift at the
resonant frequency. By contrast, the LT1959 uses a “cur-
rent mode” architecture to help alleviate phase shift cre-
ated by the inductor. The basic connections are shown in
Figure 9. Figure 10 shows a Bode plot of the phase and gain
of the power section of the LT1959, measured from the V
C
pin to the output. Gain is set by the 5.3A/V transconduc-
tance of the LT1959 power section and the effective
complex impedance from output to ground. Gain rolls off
smoothly above the 600Hz pole frequency set by the
100µF output capacitor. Phase drop is limited to about
70°. Phase recovers and gain levels off at the zero fre-
quency (16kHz) set by capacitor ESR (0.1).
Figure 9. Model for Loop Response
+
1.21V
V
SW
V
C
LT1959
GND
1959 F09
R1
OUTPUT
ESR
C
F
C
C
R
C
ERROR
AMPLIFIER
FB
R2
C1
CURRENT MODE
POWER STAGE
g
m
= 5.3A/V
+

LT1959IS8#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 4.5A, 500kHz Buck Sw Reg
Lifecycle:
New from this manufacturer.
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