DATASHEET
5P8390x OCTOBER 5, 2016 1 ©2016 Integrated Device Technology, Inc.
High-Performance 1.8V/2.5V/3.3V Crystal
Input to LVCMOS Clock Fanout Buffer with OE
5P8390x
Description
The 5P8390x is a high performance, 1-to-4/6/8 crystal input to
LVCMOS fanout buffer with output enable pins. This device
accepts a fundamental mode crystal from 10MHz to 40MHz
and outputs LVCMOS clocks with best-in-class phase noise
performance.
The 5P8390x family (5P83904, 5P83905, and 5P83908)
features a synchronous glitch-free Output Enable function to
eliminate any intermediate incorrect output clock cycles when
enabling or disabling outputs. It comes in standard TSSOP
packages or small QFN packages and can operate from 1.8V
to 3.3V supplies.
Features
• 4/6/8 copies of LVCMOS output clocks with best-in-class
phase noise performance
• Phase Noise:
Offset Noise Power (3.3V)
• 100Hz: -131 dBc/Hz
• 1KHz: -145 dBc/Hz
• 10KHz: -154 dBc/Hz
• 100KHz: -161 dBc/Hz
• Operating power supply modes:
• Full 3.3V, 2.5V, 1.8V
• Mixed 3.3V core/2.5V output operating supply
• Mixed 3.3V core/1.8V output operating supply
• Mixed 2.5V core/1.8V output operating supply
• Crystal Oscillator Interface
• Synchronous Output Enable
• Packaged in 16-, 20-pin TSSOP and QFN packages (Pb
free, fully RoHS compliant)
• Extended (-40°C to +105°C) temperature range
5P83904 Block Diagram
CLK0
ENABLE1
CLK1
CLK2
CLK3
OSC
SYNC1
SYNC2ENABLE2
XTAL_IN
XTAL_OUT
