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VS-16TTS08STRLPBF

P1-P3P4-P6P7-P7
VS-16TTS..SPbF Series
www.vishay.com
Vishay Semiconductors
Revision: 23-Aug-11
4
Document Number: 94589
For technical questions within your region: DiodesAmericas@vishay.com
, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 5 - Maximum Non-Repetitive Surge Current Fig. 6 - Maximum Non-Repetitive Surge Current
Fig. 7 - On-State Voltage Drop Characteristics
Fig. 8 - Thermal Impedance Z
thJC
Characteristics
80
100
120
140
160
180
110100
Numb er Of Equal Amplitude H alf C ycle Current Pulses (N)
At Any Rated Load Condition And With
Rated V Applied Following Surge.
Initial T = 125°C
@ 60 Hz 0.0083 s
@ 50 Hz 0.0100 s
RRM
J
Peak Half Sine Wave On-state Current (A)
16TTS..Series
80
100
120
140
160
180
200
0.01 0.1 1
Pulse Train Duration (s)
Maximum Non Repetitive Surge Current
Peak Half Sine Wave Forward Current (A)
Versus Pulse Train Duration.
Initial T = 125°C
No Voltage Reapplied
Rated V Reapplied
J
RRM
16TTS.. Series
1
10
100
1000
012345
T = 25°C
J
T = 125°C
J
Instantaneous On-st ate Voltage (V)
Instan taneous On-state Current (A)
16TTS.. Series
0.01
0.1
1
10
0.0001 0.001 0.01 0.1 1 10
Square Wave Pulse Duration (s)
thJC
Steady State Value
(DC Operation)
16TTS.. Series
Single Pulse
D = 0.50
D = 0.33
D = 0.25
D = 0.17
D = 0.08
Transient Thermal Impedance Z (°C/W)
VS-16TTS..SPbF Series
www.vishay.com
Vishay Semiconductors
Revision: 23-Aug-11
5
Document Number: 94589
For technical questions within your region: DiodesAmericas@vishay.com
, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 9 - Gate Characteristics
ORDERING INFORMATION TABLE
LINKS TO RELATED DOCUMENTS
Dimensions www.vishay.com/doc?95046
Part marking information www.vishay.com/doc?95054
Packaging information www.vishay.com/doc?95032
0.1
1
10
100
0.001 0.01 0.1 1 10 100
(b)
(a)
Rectangular gate pulse
(4)
(3) (2) (1)
Instantaneous Gate Current (A)
Instantaneous Gate Voltage (V)
TJ = 25
°C
TJ = 125 °C
b)Recommended load line for
VGD
IGD
Frequency Limited by PG(AV)
a)Recommended load line for
rated di/dt: 10 V, 20 ohms
tr = 0.5 µs, tp >= 6 µs
<= 30% rated di/dt: 10 V, 65 ohms
tr = 1 µs, tp >= 6 µs
(1) PGM = 40 , tp = 1 ms
(2) PGM = 20 W, tp = 2 ms
(3) PGM = 8 W, tp = 5 ms
(4) PGM = 4 W, tp = 10 ms
TJ = -10 °C
16TTS.. Series
Document Number: 95046 For technical questions within your region, please contact one of the following: www.vishay.com
Revision: 31-Mar-11 DiodesAmericas@vishay.com
, DiodesAsia@vishay.com, DiodesEurope@vishay.com 1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
D
2
PAK
Outline Dimensions
Vishay Semiconductors
DIMENSIONS in millimeters and inches
Notes
(1)
Dimensioning and tolerancing per ASME Y14.5 M-1994
(2)
Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outmost extremes of the plastic body
(3)
Thermal pad contour optional within dimension E, L1, D1 and E1
(4)
Dimension b1 and c1 apply to base metal only
(5)
Datum A and B to be determined at datum plane H
(6)
Controlling dimension: inch
(7)
Outline conforms to JEDEC outline TO-263AB
SYMBOL
MILLIMETERS INCHES
NOTES SYMBOL
MILLIMETERS INCHES
NOTES
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.
A 4.06 4.83 0.160 0.190 D1 6.86 8.00 0.270 0.315 3
A1 0.00 0.254 0.000 0.010 E 9.65 10.67 0.380 0.420 2, 3
b 0.51 0.99 0.020 0.039 E1 7.90 8.80 0.311 0.346 3
b1 0.51 0.89 0.020 0.035 4 e 2.54 BSC 0.100 BSC
b2 1.14 1.78 0.045 0.070 H 14.61 15.88 0.575 0.625
b3 1.14 1.73 0.045 0.068 4 L 1.78 2.79 0.070 0.110
c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.066 3
c1 0.38 0.58 0.015 0.023 4 L2 1.27 1.78 0.050 0.070
c2 1.14 1.65 0.045 0.065 L3 0.25 BSC 0.010 BSC
D 8.51 9.65 0.335 0.380 2 L4 4.78 5.28 0.188 0.208
c
B
Detail A
c2
AA
A
± 0.004
B
M
A
Lead tip
(3)
(3)
View A - A
(E)
(D1)
E1
B
H
A1
Detail “A”
Rotated 90 °CW
Scale: 8:1
L
Gauge
plane
0° to 8°
L3
L4
Seating
plane
Section B - B and C - C
Scale: None
(4)
(4)
(b, b2)
b1, b3
(c)
c1
Base
Metal
Plating
Conforms to JEDEC outline D
2
PAK (SMD-220)
132
D
C
A
L2
E
(2)(3)
(2)
4
H
BB
2 x b
2 x b2
L1
0.010
A
B
MM
(3)
e
2 x
Pad layout
MIN.
11.00
(0.43)
MIN.
9.65
(0.38)
MIN.
3.81
(0.15)
MIN.
2.32
(0.08)
17.90 (0.70)
15.00 (0.625)
2.64 (0.103)
2.41 (0.096)
Lead assignments
Diodes
1. - Anode (two die)/open (one die)
2., 4. - Cathode
3. - Anode
P1-P3P4-P6P7-P7

VS-16TTS08STRLPBF

Mfr. #:
Buy VS-16TTS08STRLPBF
Manufacturer:
Vishay Semiconductors
Description:
SCRs RECOMMENDED ALT 78-VS-16TTS08STRL-M3
Lifecycle:
New from this manufacturer.
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