LTC1263CS8#PBF

4
LTC1263
BLOCK DIAGRAM
W
+
C1
+
C1
C1
C2
+
C2
C2
S4B
S4A
S3A
S3C
S1
R1
R2
R3
BANDGAP
REFERENCE
OSCILLATOR
V
CC
V
OUT
C
IN
C
OUT
SHDN
GND
CHARGE PUMP
S4C
S3D
S3B
LTC1263 • BD
V
BGAP
S1 AND S2 SHOWN WITH SHDN PIN LOW. S3A, S3B, S3C, S3D, S4A, S4B AND S4C SHOWN CHARGING C1 AND C2
WITH OSCILLATOR OUTPUT LOW AND V
DIV
< V
BGAP
– V
HYST
. AT OSCILLATOR OUTPUT HIGH, S3A, S3B, S3C AND S3D
OPEN WHILE S4A, S4B AND S4C CLOSE TO CHARGE V
OUT
. COMPARATOR HYSTERESIS IS ±V
HYST
S2
V
DIV
CLK
TIMING DIAGRAMS
WUW
1.4V
1.4VV
SHDN
V
OUT
5.1V
12V
t
ON
t
OFF
V
OUT
V
CC
V
CC
0V
LTC1263 • F01
Figure 1. Timing Diagram
1
2
3
4
8
7
6
5
SHDN
GND
V
OUT
V
CC
C1
C1
+
C2
C2
+
LTC1263
C1 = 0.47µF
C2 = 0.47µF
LTC1263 • F02
C3 = 10µF
C4 = 10µF
V
CC
4.75V TO 5.5V
V
SHDN
V
OUT
Figure 2. Timing Circuit
5
LTC1263
The LTC1263 uses a charge pump tripler to generate 12V
from a V
CC
of 5V. The charge pump is clocked by an
internal oscillator. The oscillator frequency is not critical
and may vary from the typical value of 300kHz. When the
oscillator output is low, C1 and C2 are each connected
between V
CC
and GND, charging them to V
CC
(see Figure
3). When the oscillator output goes high, C1 and C2 are
stacked in series with the bottom plate of C1 pulled to V
CC
(see Figure 4). The top plate of C2 is switched to charge
C
OUT
, which enables V
OUT
to rise.
V
OUT
is regulated to within 5% of 12V by an oscillator pulse
gating scheme that turns the charge pump on and off
based on the comparator results of V
OUT
and a reference
voltage. First, a resistor divider senses V
OUT
; if the output
of the divider (V
DIV
) is less than the output of a bandgap
(V
BGAP
) by the hysteresis voltage (V
HYST
) of the compara-
tor, then oscillator pulses are applied to the charge pump
to raise V
OUT
. When V
DIV
is above V
BGAP
by V
HYST
, the
OPERATION
U
oscillator pulses are prevented from clocking the charge
pump. As a result, V
OUT
drops until V
DIV
is below V
BGAP
by
V
HYST
again.
To ensure proper start-up when V
OUT
is lower than V
CC
and maintain proper operation when V
OUT
is higher than
V
CC
, the gates of all internal switches are driven between
GND and the higher of either V
OUT
or V
CC
.
To reduce supply current, the LTC1263 may be put into
shutdown mode by “floating” the SHDN pin or connecting
it to V
CC
. In this mode, the bandgap, comparator, oscilla-
tor and resistor divider are switched off to reduce the
supply current to typically 0.5µA. At the same time an
internal switch shorts V
OUT
to V
CC
; V
OUT
takes 10ms (typ)
to reach 5.1V (see t
OFF
in Figure 1). When the SHDN pin
is low, the LTC1263 exits shutdown and the charge pump
operates to raise V
OUT
to 12V. V
OUT
takes 600µs (typ) to
reach the lower regulation limit of 11.4V (see t
ON
in Figure 1).
+
C1
+
C2
V
CC
LTC1263 • F03
Figure 3. C1 and C2 Charge to V
CC
Figure 4. C1 and C2 Stacked in Series with C1
Tied to V
CC
+
C1
+
C2
V
CC
LTC1263 • F04
V
OUT
C
OUT
APPLICATIONS INFORMATION
WUU
U
Choice of Capacitors
The LTC1263 is tested with the capacitors shown in Figure
2. C1 and C2 are 0.47µF ceramic capacitors and C
IN
and
C
OUT
are 10µF tantalum capacitors. Refer to Table 1 if
other choices are desired.
Table 1. Recommended Capacitor Types and Values
CAPACITOR CERAMIC TANTALUM ALUMINUM
C1, C2 0.47µF to 1µF Not Recommended Not Recommended
C
OUT
10µF (Min) 10µF (Min) 10µF (Min)
C
IN
10µF (Min) 10µF (Min) 10µF (Min)
C1 and C2 should be ceramic capacitors with values in the
range of 0.47µF to 1µF. Higher values provide better load
regulation. Tantalum capacitors are not recommended as
the higher ESR of these capacitors degrades performance
at high load currents and V
CC
= 4.75V.
C
IN
and C
OUT
can be ceramic, tantalum or electrolytic
capacitors. The ESR of C
OUT
introduces steps in the V
OUT
waveform whenever the charge pump charges C
OUT
. This
tends to increase V
OUT
ripple. Ceramic or tantalum capaci-
tors are recommended for C
OUT
if minimum ripple is
6
LTC1263
APPLICATIONS INFORMATION
WUU
U
desired. (The LTC1263 does not require a 0.1µF capacitor
between V
CC
and V
OUT
for stability.)
Besides using it to program flash memories, the LTC1263
can also provide multiple supply voltages with the help of
two diodes and two capacitors. Output voltages of 19V and
7V can easily be obtained. In other words, the LTC1263
can power dual supply (±5V) and single supply (15V) op
amps.
TYPICAL APPLICATIONS
U
Dual Voltage Supply Output at 12V and 19V
1
2
3
4
8
7
6
5
SHDN
GND
V
OUT
V
CC
C1
C1
+
C2
C2
+
LTC1263
0.47µF
0.47µF
LTC1263 • TA04
10µF
10µF
V
CC
4.75V TO 5.5V
1µF
V
OUT
= 12V
V
+
= 19V**
1µF
1N4148*
IN4148*
*
**
FOR LOWER VOLTAGE DROP, USE SCHOTTKY DIODES
MUST PULL MORE CURRENT OUT OF V
OUT
THAN V
+
Dual Supply Voltage Output at 12V and –7V
1
2
3
4
8
7
6
5
SHDN
GND
V
OUT
V
CC
C1
C1
+
C2
C2
+
LTC1263
0.47µF
0.47µF
*
**
1µF
LTC1263 • TA05
10µF
10µF
V
CC
4.75V TO 5.5V
V
OUT
= 12V
V
= –7V**
1µF
IN4148*
1N4148*
FOR LOWER VOLTAGE DROP, USE SCHOTTKY DIODES
MUST PULL MORE CURRENT OUT OF V
OUT
THAN V
1
2
3
4
8
7
6
5
SHDN
GND
V
OUT
V
CC
C1
C1
+
C2
C2
+
LTC1263
0.47µF
0.47µF
1µF
LTC1263 • TA06
10µF
10µF
V
CC
4.75V TO 5.5V
V
OUT
= 12V
+
10k
90.1k
(V
IN
)(10)
LT1006
1µF
1N4148*
1N4148*
V
IN
2
3
7
4
6
(12V)
(–7V)**
*
**
FOR LOWER VOLTAGE DROP, USE SCHOTTKY DIODES
MUST PULL MORE CURRENT OUT OF V
OUT
THAN V
Gain of 10 Amplifier Using LT
®
1006 Powered by LTC1263

LTC1263CS8#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 12V, 60mA VPP Generator
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet