ICS670-04
LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER ZDB AND MULTIPLIER
IDT™ / ICS™
LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER 4
ICS670-04 REV E 051310
AC Electrical Characteristics
VDD = 3.3V ±10%, Ambient Temperature -40 to +85° C, unless stated otherwise
Note 1: Rising edge of ICLK compared with rising edge of CLK2, with FBCLK connected to FBIN, and 15 pF load
on CLK2.
Note for OE1
The OE1 pin is intended to facilitate board test. Note that disabling the FBLK will open the loop, causing a
high-frequency to be output from CLK2. Therefore, set OE1 low only if the chip is in power-down (S3:S0 = 0).
Thermal Characteristics
Short Circuit Current I
OS
Each output ±50 mA
Internal Pull-up Resistor R
PU
OE, select pins 200 kΩ
Input Capacitance C
IN
OE, select pins 5 pF
Parameter Symbol Conditions Min. Typ. Max. Units
Parameter Symbol Conditions Min. Typ. Max. Units
Input Clock Frequency f
IN
See table on page 2 5 210 MHz
Output Clock Frequency 210 MHz
Output Rise Time t
OR
0.8 to 2.0 V, no load 1.5 ns
Output Fall Time t
OF
2.0 to 0.8 V, no load 1.5 ns
Output Clock Duty Cycle t
DC
measured at VDD/2 45 50 55 %
Input to Output Skew Note 1 ±100 ps
Maximum Absolute Jitter short term ±45 ps
Maximum Jitter one sigma 15 ps
Phase Noise, relative to
carrier, 125 MHz (x5)
100 Hz offset -103 dBc/Hz
1 kHz offset -117 dBc/Hz
10 kHz -111 dBc/Hz
200 kHz -88 dBc/Hz
Parameter Symbol Conditions Min. Typ. Max. Units
Thermal Resistance Junction to
Ambient
θ
JA
Still air 120 ° C/W
θ
JA
1 m/s air flow 115 ° C/W
θ
JA
3 m/s air flow 105 ° C/W
Thermal Resistance Junction to Case θ
JC
58 ° C/W