74ALVCF162835APFG Datasheet 74ALVCF162835APFG, 74ALVCF162835APFG8, 74ALVCF162835APAG8 | P1-P3

INDUSTRIAL TEMPERATURE RANGE

IDT74ALVCF162835A

3.3V CMOS 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS

NOVEMBER 2008INDUSTRIAL TEMPERATURE RANGE

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

FEATURES:

• 0.5 MICRON CMOS Technology

• Typical tSK(o) (Output Skew) < 250ps

• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using

machine model (C = 200pF, R = 0)

•VCC = 3.3V ± 0.3V, Normal Range

•VCC = 2.7V to 3.6V, Extended Range

•VCC = 2.5V ± 0.2V

• CMOS power levels (0.4

μμ

μ W typ. static)

• Rail-to-Rail output swing for increased noise margin

• Available in TSSOP and TVSOP packages

FUNCTIONAL BLOCK DIAGRAM

DRIVE FEATURES:

• Balanced Output Drivers: ±18mA

• Low switching noise

APPLICATIONS:

• SDRAM Modules

• PC Motherboards

• Workstations

IDT74ALVCF162835A

3.3V CMOS 18-BIT

UNIVERSAL BUS DRIVER

WITH 3-STATE OUTPUTS

DESCRIPTION:

This 18-bit universal bus driver is built using advanced dual metal CMOS

technology. Data flow from A to Y is controlled by the output-enable (OE)

input. The device operates in the transparent mode when the latch-enable

(LE) input is high. The A data is latched if the clock (CLK) input is held at

a high or low logic level. If LE is low, the A data is stored in the latch flip-flop

on the low-to-high transition of CLK. When OE is high, the outputs are in the

high-impedance state.

The ALVCF162835A has series resistors in the device output structure

which will reduce switching noise in 128MB and 256MB SDRAM modules.

Designed with a drive capability of ±18mA, the ALVCF162835A is a mid-

way drive between the ALVC162835 (±12mA) and ALVC16835 (±24mA).

The ALVCF162835A is a faster version of the ALVCF162835 or

ALVC162835. It is suitable for PC133 applications and particularly SDRAM

Modules clocked at 133 MHz.

TO 17 OTHER CHANNELS

CLK

INDUSTRIAL TEMPERATURE RANGE

IDT74ALVCF162835A

3.3V CMOS 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS

PIN CONFIGURATION

Symbol Description Max Unit

VTERM

(2)

Terminal Voltage with Respect to GND –0.5 to +4.6 V

VTERM

(3)

Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V

TSTG Storage Temperature –65 to +150 ° C

IOUT DC Output Current –50 to +50 mA

IK Continuous Clamp Current, ±50 mA

VI < 0 or VI > VCC

IOK Continuous Clamp Current, VO < 0 –50 mA

CC Continuous Current through each ±100 mA

SS VCC or GND

ABSOLUTE MAXIMUM RATINGS

(1)

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause

permanent damage to the device. This is a stress rating only and functional operation

of the device at these or any other conditions above those indicated in the operational

sections of this specification is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect reliability.

2. V

CC terminals.

3. All terminals except VCC.

Pin Names Description

OE 3-State Output Enable Inputs (Active LOW)

CLK Register Input Clock

LE Latch Enable (Transparent HIGH)

Ax Data Inputs

Yx 3-State Outputs

PIN DESCRIPTION

TSSOP/ TVSOP

TOP VIEW

GND

Y10

Y11

Y12

Y13

Y14

Y15

Y16

Y17

Y18

A10

A11

A12

A13

A14

A15

VCC

A16

A17

A18

GND

CLK

GND

VCC

GND

NOTE:

1. As applicable to the device type.

Symbol Parameter

(1)

Conditions Min. Typ. Max. Unit

CIN Input Capacitance VIN = 0V 4 5 6 pF

COUT Output Capacitance VOUT = 0V — 7 9 pF

OUT I/O Port Capacitance VIN = 0V — 7 9 pF

CAPACITANCE (TA = +25°C, F = 1.0MHz)

NOTES:

1. H = HIGH Voltage Level

L = LOW Voltage Level

X = Don’t Care

Z = High-Impedance

↑ = LOW-to-HIGH Transition

2. Output level before indicated steady-state input conditions were established, pro-

vided that CLK is HIGH before LE went LOW.

3. Output level before the indicated steady-state input conditions were established.

FUNCTION TABLE

(1)

Inputs Outputs

OE LE CLK Ax Yx

HXXX Z

LHXL L

LHXH H

LL↑ LL

LL↑ HH

LLHX Y

(2)

LLLX Y

(3)

INDUSTRIAL TEMPERATURE RANGE

IDT74ALVCF162835A

3.3V CMOS 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS

Symbol Parameter Test Conditions Min. Typ.

(1)

Max. Unit

VIH Input HIGH Voltage Level VCC = 2.3V to 2.7V 1.7 — — V

VCC = 2.7V to 3.6V 2 — —

IL Input LOW Voltage Level VCC = 2.3V to 2.7V — — 0.7 V

VCC = 2.7V to 3.6V — — 0.8

IIH Input HIGH Current VCC = 3.6V VI = VCC ——±5µA

IIL Input LOW Current VCC = 3.6V VI = GND — — ±5µA

IOZH High Impedance Output Current VCC = 3.6V VO = VCC ——±10 µ A

IOZL (3-State Output pins) VO = GND — — ±10

VIK Clamp Diode Voltage VCC = 2.3V, IIN = –18mA — –0.7 –1.2 V

VH Input Hysteresis VCC = 3.3V — 100 — mV

CCL Quiescent Power Supply Current VCC = 3.6V — 0.1 40 µA

ICCH VIN = GND or VCC

ICCZ

ΔICC Quiescent Power Supply Current One input at VCC - 0.6V, other inputs at VCC or GND — — 750 µ A

Variation

DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified:

Operating Condition: TA = –40°C to +85°C

NOTE:

1. Typical values are at VCC = 3.3V, +25°C ambient.

NOTE:

1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.

TA = – 40°C to + 85°C.

OUTPUT DRIVE CHARACTERISTICS

Symbol Parameter Test Conditions

(1)

Min. Max. Unit

VOH Output HIGH Voltage VCC = 2.3V to 3.6V IOH = – 0.1mA VCC – 0.2 — V

VCC = 2.3V IOH = – 6mA 1.9 —

IOH = – 8mA 1.7 —

VCC = 2.7V IOH = – 6mA 2.2 —

IOH = – 12mA 2 —

VCC = 3V IOH = – 8mA 2.4 —

IOH = – 18mA 2 —

VOL Output LOW Voltage VCC = 2.3V to 3.6V IOL = 0.1mA — 0.2 V

VCC = 2.3V IOL = 6mA — 0.4

IOL = 8mA — 0.55

VCC = 2.7V IOL = 6mA — 0.4

IOL = 12mA — 0.6

VCC = 3V IOL = 8mA — 0.55

IOL = 18mA — 0.8

P1-P3 P4-P6

74ALVCF162835APFG

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Manufacturer:

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Description:

Registers 3.3V CMOS 18-Bit Universal Bus Driver with 3-State Outputs

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74ALVCF162835APFG

74ALVCF162835APFG

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