MAX817L/M, MAX818L/M, MAX819L/M*
+5V Microprocessor Supervisory Circuits
______________________________________________________________________________________ 13
Watchdog Input Current
The MAX817/MAX818 WDI inputs are internally driven
through a buffer and series resistor from the watchdog
counter (Figure 1). When WDI is left unconnected, the
watchdog timer is serviced within the watchdog timeout
period by a low-high-low pulse from the counter chain.
For minimum watchdog input current (minimum overall
power consumption), leave WDI low for the majority of the
watchdog timeout period, pulsing it low-high-low once
within
7
/8 of the watchdog timeout period to reset the
watchdog timer. If instead WDI is externally driven high for
the majority of the timeout period, up to 150µA can flow
into WDI.
Using a SuperCap™ as a
Backup Power Source
SuperCaps are capacitors with extremely high capaci-
tance values (on the order of 0.47F) for their size. Since
BATT has the same operating voltage range as V
CC
, and
the battery switchover threshold voltages are typically
±30mV centered at V
BATT
, a SuperCap and simple
charging circuit can be used as a backup power source.
Figure 11 shows a SuperCap used as a backup source.
If V
CC
is above the reset threshold and V
BATT
is 0.5V
above V
CC
, current flows to OUT and V
CC
from BATT
until the voltage at BATT is less than 0.5V above V
CC
.
For example, if a SuperCap is connected to BATT
through a diode to V
CC
, and V
CC
quickly changes from
5.4V to 4.9V, the capacitor discharges through OUT
and V
CC
until V
BATT
reaches 5.1V typical. Leakage cur-
rent through the SuperCap charging diode and the
internal power diode eventually discharges the
SuperCap to V
CC
. Also, if V
CC
and V
BATT
start from
0.1V above the reset threshold and power is lost at
V
CC
, the SuperCap on BATT discharges through V
CC
until V
BATT
reaches the reset threshold. Battery-backup
mode is then initiated and the current through V
CC
goes to zero.
Operation Without a
Backup Power Source
The MAX817/MAX818/MAX819 were designed for bat-
tery-backed applications. If a backup battery is not
used, connect V
CC
to OUT, and connect BATT to
ground.
Replacing the Backup Battery
The backup power source can be removed while V
CC
remains valid, without danger of triggering a reset
pulse, if BATT is decoupled with a 0.1µF capacitor to
ground. As long as V
CC
stays above the reset thresh-
old, battery-backup mode cannot be entered.
Adding Hysteresis to the Power-Fail
Comparator (MAX817/MAX819)
The power-fail comparator has a typical input hystere-
sis of 4mV. This is sufficient for most applications where
a power-supply line is being monitored through an
external voltage divider (see Monitoring an Additional
Supply).
For additional noise margin, connect a resistor between
PFO and PFI, as shown in Figure 12. Select the ratio of
R1 and R2 such that PFI sees V
PFT
when V
IN
falls to the
Figure 11. Using a SuperCap™ as a Backup Power Source
with a +5V ±10% Supply
SuperCap is a trademark of Baknor Industries.
BATT
V
CC
OUT
RESET
GND
TO STATIC RAM
TO µP
0.1F
MAX817
MAX818
MAX819
+5V
100k
Figure 12. Adding Hysteresis to the Power-Fail Comparator
V
CC
GND
TO µP
PFI
PFO
R1
R2
R3
*OPTIONAL
C1*
V
IN
+5V
R1
+ R2
R2
V
H
= 1.25V
V
TRIP
= 1.25V
+
+
||
||
R2 R3
R1 R2 R3
MAX817
MAX819
PFO
0V
+5V
V
H
V
L
0V
V
TRIP
V
IN
( )
R1
V
L
- 1.25
R3
5
- 1.25
=
R2
1.25
( )
MAX817L/M, MAX818L/M, MAX819L/M*
+5V Microprocessor Supervisory Circuits
14 ______________________________________________________________________________________
desired trip point (V
TRIP
). Resistor R3 adds hysteresis.
It will typically be an order of magnitude greater than R1
or R2. The current through R1 and R2 should be at least
1µA to ensure that the 25nA (max) PFI input leakage
current does not shift the trip point. R3 should be larger
than 200kto prevent it from loading down the PFO pin.
Capacitor C1 adds additional noise rejection.
Monitoring an Additional Supply
(MAX817/MAX819)
The MAX817/MAX819 µP supervisors can monitor either
positive or negative supplies using a resistor voltage
divider to PFI. PFO can be used to generate an interrupt
to the µP or to trigger a reset (Figures 9 and 13).
Interfacing to µPs with
Bidirectional Reset Pins
µPs with bidirectional reset pins, such as the Motorola
68HC11 series, can contend with the MAX817/MAX818/
MAX819 RESET output. If, for example, the RESET out-
put is driven high and the µP wants to pull it low, inde-
terminate logic levels may result. To correct this,
connect a 4.7k resistor between the RESET output
and the µP reset I/O, as in Figure 14. Buffer the RESET
output to other system components.
Negative-Going V
CC
Transients
These supervisors are relatively immune to short-dura-
tion, negative-going V
CC
transients (glitches) while
issuing a reset to the µP during power-up, power-down,
and brownout conditions. Therefore, resetting the µP
when V
CC
experiences only small glitches is usually not
desirable.
The Typical Operating Characteristics show a graph of
Maximum Transient Duration vs. Reset Threshold
Overdrive for which reset pulses are not generated. The
graph was produced using negative-going V
CC
pulses,
starting at 3.3V and ending below the reset threshold by
the magnitude indicated (reset threshold overdrive). The
graph shows the maximum pulse width that a negative-
going V
CC
transient can typically have without triggering
a reset pulse. As the amplitude of the transient increases
(i.e., goes farther below the reset threshold), the maxi-
mum allowable pulse width decreases. Typically, a V
CC
transient that goes 100mV below the reset threshold and
lasts for 135µs will not trigger a reset pulse.
A 0.1µF bypass capacitor mounted close to the V
CC
pin provides additional transient immunity.
Figure 13. Monitoring a Negative Voltage
MAX817
MAX819
V
CC
GND
PFI PFO
R1
R2
V-
NOTE: V
TRIP
IS NEGATIVE
0V
PFO
0V
V
TRIP
V-
+5V
+5V
R1
5
- 1.25
R2
1.25 - V
TRIP
=
Figure 14. Interfacing to µPs with Bidirectional Reset I/O
MAX817
MAX818
MAX819
BUFFERED RESET TO OTHER SYSTEM COMPONENTS
4.7k
V
CC
GND
V
CC
GND
RESET
RESET
MAX817L/M, MAX818L/M, MAX819L/M*
+5V Microprocessor Supervisory Circuits
______________________________________________________________________________________ 15
____Pin Configurations (continued)
__________Typical Operating Circuit
WDI
GND
CE OUT
CE IN
1
2
8
7
BATT
RESET
V
CC
OUT
MAX818
DIP/SO/µMAX
TOP VIEW
3
4
6
5
MR
GND
PFO
PFI
1
2
8
7
BATT
RESET
V
CC
OUT
MAX819
DIP/SO/µMAX
3
4
6
5
CE IN*
*CE IN AND CE OUT APPLY TO MAX818 ONLY.
**WDI APPLIES TO MAX817/MAX818 ONLY.
BATT
RESET
I/O
OUT
CMOS
RAM
RESET
WDI**
CE OUT*
0.1µF
0.1µF
0.1µF
GND
MAX817
MAX818
MAX819
V
CC
ADDRESS
DECODE
REAL-
TIME
CLOCK
A0–A15
µP
+5V
Watchdog Software Considerations
(MAX817/MAX818)
To help the watchdog timer monitor software execution
more closely, set and reset the watchdog input at different
points in the program, rather than “pulsing” the watchdog
input high-low-high or low-high-low. This technique avoids
a “stuck” loop, in which the watchdog timer would contin-
ue to be reset within the loop, keeping the watchdog from
timing out. Figure 15 shows an example of a flow diagram
where the I/O driving the watchdog input is set high at the
beginning of the program, set low at the beginning of
every subroutine or loop, then set high again when the
program returns to the beginning. If the program should
“hang” in any subroutine, the problem would quickly be
corrected, since the I/O is continually set low and the
watchdog timer is allowed to time out, triggering a reset or
an interrupt. As described in the Watchdog Input Current
section, this scheme results in higher average WDI input
current than does the method of leaving WDI low for the
majority of the timeout period and periodically pulsing it
low-high-low.
Figure 15. Watchdog Flow Diagram
START
SET
WDI
LOW
SUBROUTINE
OR PROGRAM LOOP,
SET WDI
HIGH
RETURN
END

MAX818LCSA+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Supervisory Circuits 5V MPU Supervisor
Lifecycle:
New from this manufacturer.
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