www.vishay.com
224
Document Number 84670
Rev. 2.1, 25-Sep-06
TFBS5700
Vishay Semiconductors
Recommended Circuit Diagram
Operated at a clean low impedance power supply the
TFBS5700 needs only one additional external com-
ponent for setting the IRED drive current. However,
depending on the entire system design and board lay-
out, additional components may be required (see
figure 1).
The capacitor C1 is buffering the supply voltage and
eliminates the inductance of the power supply line.
This one should be a small ceramic version or other
fast capacitor to guarantee the fast rise time of the
IRED current. The resistor R1 is only necessary for
setting the IRED drive current.
Vishay transceivers integrate a sensitive receiver and
a built-in power driver. The combination of both needs
a careful circuit board layout. The use of thin, long,
resistive and inductive wiring should be avoided. The
inputs (TXD, SD) and the output RXD should be
directly (DC) coupled to the I/O circuit.
The capacitor C2 combined with the resistor R2 is the
low pass filter for smoothing the supply voltage.
R2, C1 and C2 are optional and dependent on the
quality of the supply voltages VCCx and injected
noise. An unstable power supply with dropping volt-
age during transmission may reduce the sensitivity
(and transmission range) of the transceiver.
The placement of these parts is critical. It is strongly
recommended to position C2 as close as possible to
the transceiver power supply pins.
In addition, when connecting the described circuit to
the power supply, low impedance wiring should be
used.
When extended wiring is used the inductance of the
power supply can cause dynamically a voltage drop
at V
CC2
. Often some power supplies are not able to
follow the fast current is rise time. In that case another
10 µF (type, see table under C1) at V
CC2
will be help-
ful.
Keep in mind that basic RF-design rules for circuit
design should be taken into account. Especially
longer signal lines should not be used without termi-
nation. See e.g. "The Art of Electronics" Paul Horow-
itz, Wienfield Hill, 1989, Cambridge University Press,
ISBN: 0521370957.
Table 2.
Recommended Application Circuit Components
Figure 1. Recommended Application Circuit
IRED Anode
V
cc
Ground
V
cc2
V
cc1
GND
SD
TXD
RXD
SD
TXD
RXD
R1
R2
C1
C2
19297
Component Recommended Value
C1, C2 0.1 µF, Ceramic
Vishay part# VJ 1206 Y 104 J XXMT
R1 2.9 V to 5.4 V supply voltage V
CC2
: add a
resistor in series, e.g. 4.7 Ω
R2 47 Ω, 0.125 W (V
CC1
2.5 V)
TFBS5700
Document Number 84670
Rev. 2.1, 25-Sep-06
Vishay Semiconductors
www.vishay.com
225
I/O and Software
In the description, already different I/Os are men-
tioned. Different combinations are tested and the
function verified with the special drivers available
from the I/O suppliers. In special cases refer to the
I/O manual, the Vishay application notes, or contact
directly Vishay Sales, Marketing or Application.
Programming Pulse duration Switching
After Power-on the TFBS5700 is in the default short
pulse duration mode. Some ENDECs are not able to
decode short pulses as valid SIR pulses. Therefore
an additional mode with an extended pulse duration
as in standard SIR transceivers was added in
TFBS5700. TFBS5700 is set to the “short output
pulse” as default after power on, also after recovering
from the shutdown mode (SD must have been longer
active than 1.5 ms). For mode changing see the fol-
lowing. To switch the transceivers from the short
pulse duration mode to the long pulse duration mode
and vice versa, the programming sequences
described below are required.
Setting to the ENDEC compatibility mode
with an RXD pulse duration of 2 µs
1. Set SD input to logic "HIGH".
2. Set TXD input to logic "LOW". Wait t
s
200 ns.
3. Set SD to logic "LOW" (this negative edge latches
state of TXD, which determines speed setting).
4. TXD must be held for t
h
200 ns. After waiting t
h
200 ns TXD.
TXD is now enable as normal TXD input for the longer
RXD - pulse duration mode.
Setting back to the default mode with
400 ns RXD-output pulse duration
1. Set SD input to logic "HIGH".
2. Set TXD input to logic "HIGH". Wait t
s
200 ns.
3. Set SD to logic "LOW" (this negative edge latches
state of TXD, which determines speed setting).
4. After waiting t
h
200 ns TXD is limited by the max-
imum allowed pulse length.
TXD is now enabled as normal TXD input.
The timing of the pulse duration changing procedure
is quite uncritical. However, the whole change must
not take more than 600 µs. See in the spec. “Shut-
down Active Time Window for Programming”
Simplified Method
Setting the device to the long pulse duration is nothing
else than a short active SD pulse of less than 600 µs.
In any case a short SD pulse will force the device to
leave the default mode and go the compatibility
mode. Backwards also an active SD can be used to
fall back into the default mode by applying that signal
for a minimum of 1.5 ms. That causes a power-on-
reset and sets the device to the default short pulse
mode. This simplified method takes more time but
may be easier to handle.
Figure 2. Mode Switching Timing Diagram
TXD
SD
t
s
t
h
50 %
Hig h:F IR
Low : SIR
50 %
50 %
14873
www.vishay.com
226
Document Number 84670
Rev. 2.1, 25-Sep-06
TFBS5700
Vishay Semiconductors
Recommended Solder Profiles
Solder Profile for Sn/Pb soldering
Lead (Pb)-Free, Recommended Solder Profile
The TFBS5700 is a lead (Pb)-free transceiver and
qualified for lead (Pb)-free processing. For lead
(Pb)-free solder paste like Sn(3.0-4.0)Ag(0.5-0.9)Cu,
there are two standard reflow profiles: Ramp-Soak-
Spike (RSS) and Ramp-To-Spike (RTS). The Ramp-
Soak-Spike profile was developed primarily for reflow
ovens heated by infrared radiation. With widespread
use of forced convection reflow ovens the Ramp-To-
Spike profile is used increasingly. Shown below in fig-
ure 4 is VISHAY's recommended profiles for use with
the TFBS5700 transceivers. For more details please
refer to Application note: SMD Assembly Instruction
(http://www.vishay.com/docs/82602/82602.pdf).
Wave Soldering
For TFDUxxxx and TFBSxxxx transceiver devices
wave soldering is not recommended.
Manual Soldering
Manual soldering is the standard method for lab use.
However, for a production process it cannot be rec-
ommended because the risk of damage is highly
dependent on the experience of the operator. Never-
theless, we added a chapter to the above mentioned
application note, describing manual soldering and
desoldering.
Storage
The storage and drying processes for all VISHAY
transceivers (TFDUxxxx and TFBSxxx) are equiva-
lent to MSL4.
The data for the drying procedure is given on labels
on the packing and also in the application note
"Taping, Labeling, Storage and Packing"
(http://www.vishay.com/docs/82601/82601.pdf).
Figure 3. Recommended Solder Profile for Sn/Pb soldering
0
20
40
60
80
100
120
140
160
180
200
220
240
260
0 50 100 150 200 250 300 350
Time/s
Temperat ure/°C
2...4 °C/s
2...4 °C/s
10 s max. at 230 °C
120 s...180 s
240 °C max.
90 s max.
19431
Figure 4. Solder Profile, RSS Recommendation
0
20
40
60
80
100
120
140
160
180
200
220
240
260
280
0 50 100 150 200 250 300 350
Time/s
Temperature/°C
20
s
2 °C...4 °C/s
2 °C...4 °C/s
90 s...120 s
T
217 °C for 50 s max
T
peak
= 260 °C max.
50 s max.
T
255 °C for 20 s max
19261

TFBS5700-TR3

Mfr. #:
Manufacturer:
Description:
TXRX IRDA 1.152MBIT SIDE 6-SMD
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet