74LVQ125
4/12
Table 8: AC Electrical Characteristics (C
L
= 50 pF, R
L
= 500 , Input t
r
= t
f
= 3ns)
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (t
OSLH
= |t
PLHm
- t
PLHn
|, t
OSHL
= |t
PHLm
- t
PHLn
|)
2) Parameter guaranteed by design
(*) Voltage range is 3.3V ±
0.3V
Table 9: Capacitive Characteristics
1) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/4 (per gate)
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
T
A
= 25°C
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
t
PLH
t
PHL
Propagation Delay
Time
2.7
(*)
6.0 10.0 12.0 14.0
ns
3.3
(**)
5.0 8.0 9.5 11.0
t
PLZ
t
PHZ
Output Disable
Time
2.7
(*)
6.5 10.5 12.5 14.5
ns
3.3
(**)
5.5 8.5 10.0 11.5
t
PZL
t
PZH
Output Enable
Time
2.7
(*)
6.8 11.0 12.5 14.0
ns
3.3
(**)
5.6 8.0 9.5 11.0
t
OSLH
t
OSHL
Output To Output
Skew Time
(note1, 2)
2.7 0.5 1.0 1.0 1.0
ns
3.3
(*)
0.5 1.0 1.0 1.0
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
T
A
= 25°C
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
C
IN
Input Capacitance
3.3 4 pF
C
OUT
Output
Capacitance
3.3 8 pF
C
PD
Power Dissipation
Capacitance (note
1)
3.3
f
IN
= 10MHz
19 pF
74LVQ125
5/12
Figure 3: Test Circuit
C
L
= 50pF or equivalent (includes jig and probe capacitance)
R
L
= R
1
= 500 or equivalent
R
T
= Z
OUT
of pulse generator (typically 50)
Figure 4: Waveform - Propagation Delays (f=1MHz; 50% duty cycle)
TEST SWITCH
t
PLH
, t
PHL
Open
t
PZL
, t
PLZ
2V
CC
t
PZH
, t
PHZ
Open
74LVQ125
6/12
Figure 5: Waveform - Output Enable And Disable Time (f=1MHz; 50% duty cycle)

74LVQ125TTR

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Buffers & Line Drivers Quad Bus Buffe
Lifecycle:
New from this manufacturer.
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