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NCP720BMT120TBG

P1-P3P4-P6P7-P9
© Semiconductor Components Industries, LLC, 2016
February, 2016 − Rev. 1
1 Publication Order Number:
NCP720/D
NCP720
350mA, Very Low Dropout
Bias Rail CMOS Voltage
Regulator
The NCP720 is a 350 mA VLDO equipped with NMOS pass
transistor and a separate bias supply voltage (V
BIAS
). The device
provides very stable, accurate output voltage with low noise suitable
for space constrained, noise sensitive applications. In order to
optimize performance for battery operated portable applications, the
NCP720 features low I
Q
consumption. The WDFN6 2 mm x 2 mm
package is optimized for use in space constrained applications.
Features
• Input Voltage Range: 0.8 V to 5.5 V
• Bias Voltage Range: 2.4 V to 5.5 V
• Fixed Output Voltage Device
• Output Voltage Range: 0.8 V to 2.1 V
• ±2% Accuracy over Temperature
• Ultra−Low Dropout: 110 mV typically at 350 mA
• Very Low Bias Input Current of Typ. 80 mA
• Very Low Bias Input Current in Disable Mode: Typ. 0.5 mA
• Low Noise, High PSRR
• Built−In Soft−Start with Monotonic V
OUT
Rise
• Stable with a 2.2 mF Ceramic Capacitor
• Available in WDFN6 − 2 mm x 2 mm Package
• These are Pb−Free Devices
Typical Applications
• Battery−powered Equipment
• Smartphones, Tablets
• Cameras, DVRs, STB and Camcorders
BIAS
IN
EN
OUT
GND
2.2 mF
V
OUT
1.5 V @ 350 mA
V
BIAS
V
IN
V
EN
NCP720
Figure 1. Typical Application Schematics
www.onsemi.com
See detailed ordering, marking and shipping information on
page 8 of this data sheet.
ORDERING INFORMATION
MARKING
DIAGRAM
WDFN6
CASE 511BR
PIN CONNECTIONS
Thermal
T
Pad
1
2
3
6
5
4
OUT
NC
EN
IN
GND
BIAS
(Top VIew)
XX = Specific Device Code
M = Date Code
XX M
1
NCP720
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2
EN
CURRENT
LIMIT
THERMAL
LIMIT
UVLO
+
−
VOLTAGE
REFERENCE
IN
BIAS
GND
OUT
ENABLE
BLOCK
Figure 2. Simplified Schematic Block Diagram
PIN FUNCTION DESCRIPTION
Pin No. Pin Name Description
1 OUT Regulated Output Voltage pin
2 N/C Not internally connected
3 EN Enable pin. Driving this pin high enables the regulator. Driving this pin low puts the regulator into shutdown mode.
4 BIAS Bias voltage supply for internal control circuits. This pin is monitored by internal Under-Voltage Lockout Circuit.
5 GND Ground pin
6 IN Input Voltage Supply pin
Pad Should be soldered to the ground plane for increased thermal performance.
ABSOLUTE MAXIMUM RATINGS
Rating Symbol Value Unit
Input Voltage (Note 1) V
IN
−0.3 to 6 V
Output Voltage V
OUT
−0.3 to (V
IN
+0.3) ≤ 6 V
Chip Enable and Bias Input V
EN,
V
BIAS
−0.3 to 6 V
Output Short Circuit Duration t
SC
unlimited s
Maximum Junction Temperature T
J
150 °C
Storage Temperature T
STG
−55 to 150 °C
ESD Capability, Human Body Model (Note 2) ESD
HBM
2000 V
ESD Capability, Machine Model (Note 2) ESD
MM
200 V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection (except OUT pin) and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114
ESD Machine Model tested per EIA/JESD22−A115
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
THERMAL CHARACTERISTICS
Rating Symbol Value Unit
Thermal Characteristics, WDFN6 2 mm x 2 mm Thermal Resistance, Junction−to−Air (Note 3) R
q
JA
65 °C/W
3. This data was derived by thermal simulations based on the JEDEC JESD51 series standards methodology. Only a single device mounted
at the center of a high*K (2s2p) 3in x 3in multilayer board with 1−ounce internal planes and 2−ounce copper on top and bottom. Top copper
layer has a dedicated 125 sqmm copper area.
NCP720
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3
ELECTRICAL CHARACTERISTICS
Over Operating Temperature Range (T
J
= −40°C to +125°C), V
BIAS
= (V
OUT
+ 1.4 V) or 2.5 V, whichever is greater; V
IN
≥ V
OUT
+ 0.5 V,
I
OUT
= 1 mA, V
EN
= 1.1 V, C
OUT
= 2.2 mF, unless otherwise noted. Typical values are at T
J
= +25°C.
Parameter
Test Conditions Symbol Min Typ Max Unit
Operating Input Voltage Range V
IN
V
OUT
+
V
DO
_
IN
5.5 V
Operating Bias Voltage Range V
BIAS
(V
OUT
+ 1.4)
≥ 2.4
5.5 V
Output Voltage Range (Note 4) 0.8 2.1 V
Output
Voltage
Accuracy
Nominal T
J
= +25°C V
OUT
±0.5 %
Over V
BIAS
, V
IN
, I
OUT
,
T
J
= –40°C to +125°C
V
OUT
+ 1.4 V ≤ V
BIAS
≤ 5.5 V,
V
OUT
+ 0.5 V ≤ V
IN
≤ 4.5 V,
0mA ≤ I
OUT
≤ 350 mA
V
OUT
-2 +2 %
V
IN
Line Regulation V
IN
= (V
OUT
+ 0.5 V) to 4.5 V, I
OUT
= 1mA
DV
OUT
/DV
IN
5.0
mV/V
V
BIAS
Line Regulation
V
BIAS
= (V
OUT
+ 1.4 V) or 2.5 V (which-
ever is greater) to 5.5 V, I
OUT
= 1 mA
DV
OUT
/DV
BIAS
16
mV/V
Load Regulation 0 mA ≤ I
OUT
≤ 350 mA (no load to full load)
DV
OUT
/DI
OUT
–1.0
mV/mA
V
IN
Dropout Voltage (Note 5)
V
IN
= V
OUT(NOM)
– 0.1 V,
(V
BIAS
– V
OUT(NOM)
) = 1.4 V,
I
OUT
= 350 mA
V
DO
_
IN
110 200 mV
V
BIAS
Dropout Voltage (Note 6) V
IN
= V
OUT(NOM)
+ 0.3 V, I
OUT
= 350 mA V
DO
_
BIAS
1.15 1.4 V
Output Current Limit VOUT = 0.9 x VOUT(NOM) I
CL
420 525 800 mA
Bias Pin Current I
OUT
= 0 mA to 350 mA I
BIAS
80 110
mA
Shutdown Current (I
GND
) V
EN
≤ 0.4 V, T
J
= -40°C to +85°C ISHDN 0.5 2.0
mA
V
IN
Power-Supply Rejection Rati
o
V
IN
– V
OUT
≥ 0.5 V,
V
BIAS
= V
OUT
+ 1.4 V,
I
OUT
= 350 mA
f = 10 Hz
PSRR (V
IN
)
52
dB
f = 100 Hz 56
f = 1 kHz 65
f = 10 kHz 46
f = 100 kHz 37
f = 1 MHz 25
V
BIAS
Power-Supply Rejection
Ratio
V
IN
– V
OUT
≥ 0.5 V,
V
BIAS
= V
OUT
+ 1.4 V,
I
OUT
= 350 mA
f = 10 Hz
PSRR (V
BIAS
)
65
dB
f = 100 Hz 65
f = 1 kHz 70
f = 10 kHz 50
f = 100 kHz 35
f = 1 MHz 24
Output Noise Voltage
BW = 10 Hz to 100 kHz
V
N
40
mVRMS
Inrush Current on V
IN
I
VIN_INRUSH
100 +
I
LOAD
mA
Startup Time
V
OUT
= 95% V
OUT(NOM)
, I
OUT
= 350 mA,
C
OUT
= 2.2 mF
t
STR
140
ms
Enable Pin High (enabled) V
EN(HI)
1.1 V
Enable Pin Low (disabled) V
EN(LO)
0 0.4 V
Enable Pin Current V
EN
= 5.5 V I
EN
0.3 1
mA
Undervoltage Lock-out V
BIAS
rising
UVLO
1.6 V
Hysteresis V
BIAS
falling 0.2 V
Thermal Shutdown Temperature
Shutdown, temperature increasing
TSD
+160 °C
Reset, temperature decreasing +140 °C
Operating Junction Temperature T
J
–40 +125 °C
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. V
OUT
nominal value is factory programmable.
5. Measured for devices with V
OUT(NOM)
≥ 1.2V.
6. V
BIAS
– V
OUT
with V
OUT
= V
OUT(NOM)
– 0.1V.
P1-P3P4-P6P7-P9

NCP720BMT120TBG

Mfr. #:
Buy NCP720BMT120TBG
Manufacturer:
ON Semiconductor
Description:
LDO Voltage Regulators 350MA VERY LOW DROPO
Lifecycle:
New from this manufacturer.
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