ISD4002-180S Datasheet ISD4002-120E, ISD4002-120ED, ISD4002-120EI | P25-P27

ISD4002 SERIES

Publication Release Date: September 2003

- 25 - Revision 1

10.2. PARAMETERS FOR DIE

TABLE 11: DC PARAMETERS

PARAMETERS

[6]

SYMBOL MIN

[2]

TYP

[1]

MAX

[2]

UNITS CONDITIONS

V

CC

Current (Operating)

-Playback

-Record

I

CC

15

25

30

40

mA

R

EXT

= ∞

[3]

R

EXT

= ∞

[3]

V

CC

Current (Standby) I

SB

1 10 µA

[3] [4]

Total Harmonic Distortion THD 1 2 % @ 1 KHz sinewave

ANA IN+ or ANA IN- to AUD

OUT Gain

A

ARP

20 23 26 dB

[5]

Notes:

[1]

Typical values @ T

A

= 25°C and V

CC

= 3.0V.

[2]

All Min/Max limits are guaranteed by Winbond via electrical testing or characterization. Not all

specifications are 100 percent tested.

[3]

V

CCA

and V

CCD

connected together.

[4]

SS = V

CCA

= V

CCD

, XCLK = MOSI = V

SSA

= V

SSA

and all other pins floating.

[5]

Measured with AutoMute feature disabled.

[6]

The test coverage for die is limited to room temperature testing. The test conditions may differ from that

of packaged parts.

ISD4002 SERIES

- 26 -

10.3. SPI AC PARAMETERS

TABLE 13: AC PARAMETERS

[1]

PARAMETER SYMBOL MIN TYP MAX UNITS CONDITIONS

SS Setup Time

T

SSS

500 nsec

SS Hold Time

T

SSH

500 nsec

Data in Setup Time T

DIS

200 nsec

Data in Hold Time T

DIH

200 nsec

Output Delay T

PD

500 nsec

Output Delay to HighZ

[2]

T

DF

500 nsec

SS HIGH

T

SSmin

1 µsec

SCLK High Time T

SCKhi

400 nsec

SCLK Low Time T

SCKlow

400 nsec

CLK Frequency F

0

1,000 KHz

Notes:

[1]

Typical values @ T

A

= 25°C, V

CC

= 3.0V and timing measurement at 50%.

[2]

Tri-state test condition.

MISO

V

CC

6.32K

10.91K

50pF (Includes scope and fixture capacitance)

Ω

ISD4002 SERIES

Publication Release Date: September 2003

- 27 - Revision 1

11. TYPICAL APPLICATION CIRCUIT

These application examples are for illustration purposes only. Winbond makes no representation or

warranty that such application will be suitable for production.

Make sure all bypass capacitors are as close as possible to the package.

68HC705C8P

ISD4002

15-30 pF

C9

15-25 pF

C8

10 K

R7

Ω

47 K

R6

Ω

47 K

R5

Ω

39

38

1

2

37

35

11

10

9

8

7

6

5

4

19

18

17

16

15

14

13

12

21

22

23

24

25

26

27

28

34

33

32

31

30

29 3

2

28

1

16

17

24

25

26

14

13

11

12

23

18

4

27

13

14

5

6

7

3

2

16

9

8

4

1

12

15

10

11

C11

0.1 F

µ

C12

0.1 F

µ

C5

1 F

µ

C4

1 F

µ

C3 0.22 F

µ

C2 0.22 F

µ

C1

47 F

µ

V

CC

R1

10K

R2

1M

R3 100

R4

100K POT

LINE OUT

EXT

SPEAKER

C6

1 F

µ

C7

.1 F

µ

J4

3

2

4

5

1

3

2

1

3

4

5

1

J1

U

3

U

1

U

2

LM4860M

OCS1

OCS2

RESET

IRQ

TCAP

TCMP

PA0

PA1

PA2

PA3

PA4

PA5

PA6

PA7

PD7

PB0

PB1

PB2

PB3

PB4

PB5

PB6

PB7

PC0

PC1

PC2

PC3

PC4

PC5

PC6

PC7

PD0/RDI

PD1/TD0

PD2/MISO

PD3/MOSI

PD4/SCK

PD5/SS

MISO

MOSI

SCLK

SS

ANA IN-

ANA IN+

RAC

INT

XCLK

AM CAP

V

CCD

V

SSD

V

CCA

V

SSA

V

SSA

V

SSA

AUD OUT

-IN

+IN

BYPASS

HP-IN1

HP-IN2

HPSENSE

SHUTDOWN

GAIN-OUT

V01

V02

V

DD

GND

PDIP / SOIC

FIGURE 9: APPLICATION EXAMPLE USING SPI

ISD4002-180S

ISD4002-180S

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