MAX7324
I
2
C Port Expander with Eight Push-Pull Outputs
and Eight Inputs
______________________________________________________________________________________ 13
When the master reads 2 bytes from the output ports of
the MAX7324 and subsequently issues a STOP condi-
tion (Figure 7), the MAX7324 transmits the current port
data, followed by the transition flags. The transition
flags are then cleared, and transition detection is reset.
INT deasserts during the slave acknowledge. The new
snapshot data is the current port data transmitted to the
master, and therefore, port transitions occuring during
the transmission are detected. INT remains high until
the STOP condition. When the master reads more than
2 data bytes, the input port data alternates with the
transition flag.
A read from the output ports of the MAX7324 starts with
the master transmitting the ports’ slave address with
the R/W bit set high. The MAX7324 acknowledges the
slave address and samples the logic state of the output
ports during the acknowledge bit. The master can read
one or more bytes from the output ports of the
MAX7324, and then issues a STOP condition (Figure 8).
The MAX7324 transmits the current port data, read
back from the actual port outputs (not the port output
latches) during the acknowledge. If a port is forced to a
logic state other than its programmed state, the read-
back reflects this. If driving a capacitive load, the read-
back port level verification algorithms may need to take
the RC rise/fall time into account.
Typically, the master reads one byte from the ouput
ports of the MAX7324, then issues a STOP condition
(Figure 8). However, the master can read two or more
bytes from the output ports of the MAX7324, and then
issues a STOP condition. In this case, the MAX7324
resamples the port outputs during each acknowledge
and transmits the new data each time.
SCL
MAX7324 SLAVE ADDRESSSA P1
PORTS
ACKNOWLEDGE
FROM MAX7324
ACKNOWLEDGE
FROM MASTER
PORT SNAPSHOT
t
IV
t
PH
t
IR
A
I0
I1
I2I3I4I5
I6
I7
D0D1D2D3D4D5D6D7
PORT SNAPSHOT
t
PS
t
IP
F0
F1
F2F3F4F5
F6
F7
D7 D6 D5 D4 D3 D2 D1 D0 A
PORT SNAPSHOT
FLAG
INT OUTPUT
R/W
S = START CONDITION A = ACKNOWLEDGE
P = STOP CONDITION
INT REMAINS HIGH UNTIL STOP CONDITION
Figure 7. Reading Input Ports of the MAX7324 (2 Data Bytes)
SCL
MAX7324 SLAVE ADDRESS
SA
P
1
ACKNOWLEDGE FROM MAX7324
PORT SNAPSHOT DATA
PORT SNAPSHOT TAKEN
A
P0P1P2P3
DATA 1
P4P5P6P7
D0D1D2D3D4D5D6D7
PORT SNAPSHOT TAKEN
ACKNOWLEDGE
FROM MASTER
R/W
Figure 8. Reading Output Ports of the MAX7324
MAX7324
I
2
C Port Expander with Eight Push-Pull Outputs
and Eight Inputs
14 ______________________________________________________________________________________
Writing to the MAX7324
A write to the input ports of the MAX7324 starts with the
master transmitting the group’s slave address with the
R/W bit set low. The MAX7324 acknowledges the slave
address and samples the ports during the acknowl-
edge bit. INT deasserts during the slave acknowledge.
The master can now transmit one or more bytes of
data. The MAX7324 acknowledges these subsequent
bytes of data and updates the interrupt mask register
with each new byte until the master issues a STOP con-
dition (Figure 9).
A write to the output ports of the MAX7324 starts with
the master transmitting the group’s slave address with
the R/W bit set low. The MAX7324 acknowledges the
slave address and samples the ports during the
acknowledge bit. The master can now transmit one or
more bytes of data. The MAX7324 acknowledges these
subsequent bytes of data and updates the correspond-
ing group’s ports with each new byte until the master
issues a STOP condition (Figure 10).
SCL
SDA
START CONDITION R/W
SLAVE ADDRESS
S0
12345678
AAA
t
PV
DATA 1 DATA 2
t
PV
DATA TO INTERRUPT MASK DATA TO INTERRUPT MASK
Figure 9. Writing to the Input Ports of the MAX7324
SCL
SDA
START CONDITION ACKNOWLEDGE
FROM SLAVE
SLAVE ADDRESS
S0
12345678
AAA
t
PV
DATA 1 DATA 2
DATA 2 VALIDDATA 1 VALID
WRITE
TO PORT
DATA OUT
FROM PORT
ACKNOWLEDGE
FROM SLAVE
ACKNOWLEDGE
FROM SLAVE
t
PV
DATA TO PORT DATA TO PORT
R/W
Figure 10. Writing to the Output Ports of the MAX7324
MAX7324
I
2
C Port Expander with Eight Push-Pull Outputs
and Eight Inputs
______________________________________________________________________________________ 15
Applications Information
Port Input and I
2
C Interface Level
Translation from Higher or Lower
Logic Voltages
SDA, SCL, AD0, AD2, RST, INT, and I0–I7 are overvolt-
age protected to +6V. This allows the MAX7324 to
operate from a lower supply voltage, such as +3.3V,
while the I
2
C interface and/or any of the eight input
ports are driven from a higher logic level, such as +5V.
The MAX7324 can operate from a higher supply volt-
age, such as +3V, while the I
2
C interface and/or some
of the input ports I0–I7 are driven from a lower logic
level, such as +2.5V. For V+ < 1.8V, apply a minimum
voltage of 0.8 x V+ to assert a logic-high on any input.
For V+ 1.8V, apply a voltage of 0.7 x V+ to assert a
logic-high. For example, a MAX7324 operating from a
+5V supply may not recognize a +3.3V nominal logic
high. One solution for input level translation is to drive
the MAX7324 inputs from open-drain outputs. Use a
pullup resistor to V+ or a higher supply to ensure a high
logic voltage greater than 0.7 x V+.
Port Output Signal Level Translation
RST, SCL, SDA, AD0, and AD2 remain high impedance
with up to +6V asserted on them when the MAX7324 is
powered down (V+ = 0). The MAX7324 can therefore
be used in hot-swap applications.
Each of the eight output ports has protection diodes to
V+ and GND. When a port output is driven to a voltage
higher than V+ or lower than GND, the appropriate pro-
tection diode clamps the output to a diode drop above
V+ or below GND. When the MAX7324 is powered
down (V+ = 0), every output port's protection diodes to
V+ and GND continue to appear as a diode clamp from
each output to GND (Figure 11).
Each of the input ports I0–I7 has a protection diode to
GND (Figure 12). When a port input is driven to a volt-
age lower than GND, the protection diode clamps the
voltage to a diode drop below GND.
Each of the eight input ports I0–I7 also has a 40k (typ)
pullup resistor that can be enabled or disabled. When a
port input is driven to a voltage higher than V+
,
the
body diode of the pullup enable switch conducts and
the 40k pullup resistor is enabled. When the
MAX7324 is powered down (V+ = 0), every input port
appears as a 40k resistor in series with a diode con-
nected to ground. Input ports are protected to +6V
under any of these circumstances.
Driving LED Loads
When driving LEDs from one of the eight output ports,
O8–O15, a resistor must be fitted in series with the LED to
limit the LED current to no more than 20mA. Connect the
LED cathode to the MAX7324 port, and the LED anode
to V+ through the series current-limiting resistor, R
LED
.
I0–I7
PULLUP
ENABLE
INPUT
40k
V+
V+
MAX7324
Figure 12. MAX7324 Input Port Structure
OUTPUT
V+
GNDGND
V+
O8–O15
MAX7324
Figure 11. MAX7324 Output Port Structure

MAX7324ATG+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Interface - I/O Expanders I2C Port Expander w/8 P-P Out & 8 In
Lifecycle:
New from this manufacturer.
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