Table 12: Serial Presence-Detect EEPROM DC Operating Conditions
Parameter/Condition Symbol Min Max Units
EEPROM and AMB supply voltage V
DDSPD
3 3.6 V
Input high voltage: Logic 1; all inputs V
IH
V
DDSPD
× 0.7 V
DDSPD
+ 0.5 V
Input low voltage: Logic 0; all inputs V
IL
–0.6 V
DDSPD
× 0.3 V
Output low voltage: I
OUT
= 3mA V
OL
–
0.4 V
Input leakage current: V
IN
= GND to V
DD
I
LI
0.10 3 µA
Output leakage current: V
OUT
= GND to V
DD
I
LO
0.05 3 µA
Standby current I
SB
1.6 4 µA
Power supply current, READ: SCL clock frequency = 100 kHz I
CCR
0.4 1 mA
Power supply current, WRITE: SCL clock frequency = 100 kHz I
CCW
2 3 mA
Table 13: Serial Presence-Detect EEPROM AC Operating Conditions
Parameter/Condition Symbol Min Max Units Notes
SCL LOW to SDA data-out valid
t
AA 0.2 0.9 µs 1
Time the bus must be free before a new transition can start
t
BUF 1.3
–
µs
Data-out hold time
t
DH 200
–
ns
SDA and SCL fall time
t
F
–
300 ns 2
Data-in hold time
t
HD:DAT 0
–
µs
Start condition hold time
t
HD:STA 0.6
–
µs
Clock HIGH period
t
HIGH 0.6
–
µs
Noise suppression time constant at SCL, SDA inputs
t
I
–
50 ns
Clock LOW period
t
LOW 1.3
–
µs
SDA and SCL rise time
t
R
–
0.3 µs 2
SCL clock frequency
f
SCL
–
400 kHz
Data-in setup time
t
SU:DAT 100
–
ns
Start condition setup time
t
SU:STA 0.6
–
µs 3
Stop condition setup time
t
SU:STO 0.6
–
µs
WRITE cycle time
t
WRC
–
10 ms 4
Notes:
1. To avoid spurious start and stop conditions, a minimum delay is placed between SCL = 1
and the falling or rising edge of SDA.
2. This parameter is sampled.
3. For a restart condition, or following a WRITE cycle.
4. The SPD EEPROM WRITE cycle time (
t
WRC) is the time from a valid stop condition of a
write sequence to the end of the EEPROM internal ERASE/PROGRAM cycle. During the
WRITE cycle, the EEPROM bus interface circuit is disabled, SDA remains HIGH due to pull-
up resistance, and the EEPROM does not respond to its slave address.
Serial Presence-Detect Data
For the latest serial presence-detect data, refer to Micron's SPD page: www.micron.com/
SPD.
1GB, 2GB (x72, DR) 240-Pin DDR2 SDRAM FBDIMM
Serial Presence-Detect EEPROM
PDF: 09005aef83d4d75e
htf18c128_256x72fdz.pdf - Rev. B 07/10 EN
11
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2009 Micron Technology, Inc. All rights reserved.
