OP490GSZ-REEL Datasheet OP490GSZ-REEL, OP490GPZ, OP490GSZ | P4-P6

OP490

Rev. E | Page 3 of 16

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

@ V

S

= ±1.5 V to ±15 V, T

A

= 25°C, unless otherwise noted.

Table 1.

Parameter Symbol Conditions Min Typ Max Unit

INPUT CHARACTERISTICS

Input Offset Voltage V

OS

0.6 1.0 mV

Input Offset Current I

OS

V

CM

= 0 V 0.4 5 nA

Input Bias Current I

B

V

CM

= 0 V 4.2 25 nA

Large Signal Voltage Gain A

VO

V

S

= ±15 V, V

O

= ±10 V

R

L

= 100 kΩ 400 800 V/mV

R

L

= 10 kΩ 200 400 V/mV

R

L

= 2 kΩ 100 200 V/mV

V+ = 5 V, V− = 0 V, 1 V < V

O

< 4 V

R

L

= 100 kΩ 100 250 V/mV

R

L

= 10 kΩ 70 140 V/mV

Input Voltage Range

1

IVR V+ = 5 V, V− = 0 V 0 4 V

Common-Mode Rejection Ratio CMRR V+ = 5 V, V− = 0 V, 0 V < V

CM

< 4 V 80 100 dB

V

S

= ±15 V, −15 V < V

CM

< +13.5 V 90 120 dB

Input Resistance Differential Mode R

IN

V

S

= ±15 V 30 MΩ

Input Resistance Common-Mode R

INCM

V

S

= ±15 V 20 GΩ

OUTPUT CHARACTERISTICS

Output Voltage Swing V

O

L

V

S

= ±15 V, R

L

= 10 kΩ ±13.5 ±14.2 V

V

S

= ±15 V, R

L

= 2 kΩ ±10.5 ±11.5 V

Output Voltage High V

OH

V+ = 5 V, V− = 0 V, R

L

= 2 kΩ 4.0 4.2 V

Output Voltage Low V

OL

V+ = 5 V, V− = 0 V, R

L

= 10 kΩ 100 500 μV

Capacitive Load Stability A

V

= 1 650 pF

DYNAMIC PERFORMANCE

Slew Rate SR V

S

= ±15 V 5 12 V/ms

Channel Separation

2

CS f

O

= 10 Hz, V

O

= 20 V p-p, V

S

= ±15 V 120 150 dB

Gain Bandwidth Product GBWP A

V

= 1 20 kHz

POWER SUPPLY

Power Supply Rejection Ratio PSRR 3.2 10 μV/V

Supply Current (All Amplifiers) I

SY

V

S

= ±1.5 V, no load 40 60 μA

V

S

= ±15 V, no load 60 80 μA

NOISE PERFORMANCE

Voltage Noise e

n

p-p f

O

= 0.1 Hz to 10 Hz, V

S

= ±15 V 3 μV p-p

Voltage Noise Density e

n

f = 1 kHz 60 nV/√Hz

Current Noise Density i

n

f = 1 kHz 0.07 pA/√Hz

1

Guaranteed by CMRR test.

2

Guaranteed but not 100% tested.

OP490

Rev. E | Page 4 of 16

@ V

S

= ±1.5 V to ±15 V, −40°C ≤ T

A

≤ +85°C

Table 2.

Parameter Symbol Conditions Min Typ Max Unit

INPUT CHARACTERISTICS

Input Offset Voltage V

OS

0.8 1.5 mV

Average Input Offset Voltage Drift TCV

OS

V

S

= ±15 V 4 μV/°C

Input Offset Current I

OS

V

CM

= 0 V 1.3 7 nA

Input Bias Current I

B

V

CM

= 0 V 4.4 25 nA

Large Signal Voltage Gain A

VO

V

S

= ±15 V, V

O

= ±10 V

R

L

= 100 kΩ 300 600 V/mV

R

L

= 10 kΩ 150 250 V/mV

R

L

= 2 kΩ 75 125 V/mV

V+ = 5 V, V− = 0 V, 1 V < V

O

< 4 V

R

L

= 100 kΩ 80 160 V/mV

R

L

= 10 kΩ 40 90 V/mV

Input Voltage Range

1

IVR V+ = 5 V, V− = 0 V 0.3 5 V

−15 +13.5 V

Common-Mode Rejection Ratio CMRR V+ = 5 V, V− = 0 V, 0 V < V

CM

< 3.5 V 80 100 dB

V

S

= ±15 V, −15 V < V

CM

< +13.5 V 90 110 dB

OUTPUT CHARACTERISTICS

Output Voltage Swing V

O

V

S

= ±15 V ±13 ±14 V

R

L

= 2 kΩ ±10 ±11 V

Output Voltage High V

OH

V+ = 5 V, V− = 0 V, R

L

= 2 kΩ 3.9 4.1 V

Output Voltage Low V

OL

V+ = 5 V, V− = 0 V, R

L

= 10 kΩ 100 500 μV

POWER SUPPLY

Power Supply Rejection Ratio PSRR 5.6 17.8 μV/V

Supply Current (All Amplifiers) I

SY

V

S

= ±1.5 V, no load 60 100 mA

V

S

= ±15 V, no load 75 120 mA

1

Guaranteed by CMRR test.

00308-003

V–

–

IN

V

+

OUTPUT

+IN

Figure 3. Simplified Schematic

OP490

Rev. E | Page 5 of 16

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Rating

Supply Voltage ±18 V

Digital Input Voltage [(V−) − 20 V] to [(V+) + 20 V]

Common-Mode Input Voltage [(V−) − 20 V] to [(V+) + 20 V]

Output Short-Circuit Duration Continuous

Storage Temperature Range −65°C to +150°C

Operating Temperature Range −40°C to +85°C

Junction Temperature (T

J

) Range −65°C to +150°C

Lead Temperature (Soldering,

60 sec)

300°C

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

THERMAL RESISTANCE

θ

JA

is specified for worst-case mounting conditions, that is, θ

JA

is

specified for a device in socket for the PDIP package; θ

JA

is

specified for a device soldered to a printed circuit board (PCB)

for the SOIC package.

Table 4.

Package Type θ

JA

θ

JC

Unit

14-Lead PDIP_N (S-Suffix) 76 33 °C/W

16-Lead SOIC_R (S-Suffix) 92 27 °C/W

ESD CAUTION

OP490GSZ-REEL

OP490GSZ-REEL

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