LTC4232-1
13
42321fb
For more information www.linear.com/LTC4232-1
Figure 6. 5A, 12V Card Resident Application
ADC
C1
F
R2
20k
12V
R3
140k
R4
20k
R
MON
20k
UV = 9.88V
OV = 15.2V
PG = 10.5V
42321 F06
C
T
0.1µF
C
GATE
4.7nF
C
COMP
3.3nF
C
L
150µF
V
DD
UV
OUT
FB
GATE
PG
GND
I
MON
I
SET
LTC4232-1
OV
INTV
CC
TIMER
F LT
+
V
OUT
12V
5A
R7
10k
R6
20k
R5
150k
R
GATE
100k
Z1*
*TVS Z1: DIODES INC. SMAJ17A
R1
226k
applicaTions inForMaTion
Once the PG comparator is high the GATE pin voltage is
monitored with respect to the OUT pin. Once the GATE
minus OUT voltage exceeds 4.2V the PG pin goes high.
This indicates to the system that it is safe to load the OUT
pin while the MOSFET is completely turned “on”. The PG
pin goes low when the GATE is commanded off (using
the UV, OV or SENSE pins) or when the PG comparator
drives low.
Design Example
Consider the following design example (Figure 6): V
IN
=
12V, I
MAX
= 5A. I
INRUSH
= 750mA, C
L
= 150µF, V
UVON
=
9.88V, V
OVOFF
= 15.2V, V
PGTHRESHOLD
= 10.5V. A current
limit fault triggers an automatic restart of the power-up
sequence.
The inrush current is set to 750mA using C
GATE
:
C
GATE
= C
L
I
GATE(UP)
I
INRUSH
= 150µF
24µA
750mA
4.7nF
Calculate the time it takes to charge C
L
:
t
CHARGEUP
=
C
L
V
IN
I
INRUSH
=
150µF 12V
750mA
= 2.4ms
The peak power dissipation of 12V at 750mA (or 9W) must
not exceed the SOA of the pass MOSFET for 2.4ms (see
MOSFET SOA graph in the Typical Performance Charac-
teristics section).
Next the power dissipated in the MOSFET during over
cur-
rent must be limited. The active current limit uses a timer
to prevent excessive energy dissipation in the MOSFET
.
The worst-case power dissipation occurs when the voltage
versus current profile of the foldback current limit is at
the maximum. This occurs when the current is 6.1A and
the voltage is one half of the V
IN
or 6V. See the Current
Limit Threshold Foldback graph in the Typical Performance
Characteristics section to view this profile. In order to
survive 36W, the MOSFET SOA dictates a maximum time
of 10ms (see SOA graph). Therefore, it is acceptable to set
the current limit timeout using C
T
to be 1.2ms:
C
T
=
1.2ms
12[ms /µF]
= 0.1µF
After the 1.2ms timeout the F LT pin needs to pull-down
on the UV pin to restart the power-up sequence.
LTC4232-1
14
42321fb
For more information www.linear.com/LTC4232-1
applicaTions inForMaTion
The values for overvoltage, undervoltage and power good
thresholds using the resistive dividers on the UV, OV and
FB pins match the requirements of turn-on at 9.88V and
turn-off at 15.2V.
The final schematic in Figure 6 results in very few external
components. The pull-up resistor, R7, connects to the PG
pin while the 20k (R
MON
) converts the I
MON
current to a
voltage at a ratio:
V
IMON
= 20[µA/A] 20k I
OUT
= 0.4[V/A] I
OUT
In addition there is a 1µF bypass (C1) on the INTV
CC
pin.
Layout Considerations
In Hot Swap applications where load currents can be 5A,
narrow PCB tracks exhibit more resistance than wider tracks
and operate at elevated temperatures. The minimum trace
width for 1oz copper foil is 0.02" per amp to make sure
the trace stays at a reasonable temperature. Using 0.03"
per amp or wider is recommended. Note that 1oz copper
Figure 7. Recommended Layout
42321 F07
HEAT SINK
VIA TO
SINK
GND
C
OUTV
DD
exhibits a sheet resistance of about 0.5mΩ/square. Small
resistances add up quickly in high current applications.
There are two V
DD
pins on opposite sides of the package
that connect to the sense resistor and MOSFET. The PCB
layout should be balanced and symmetrical to each V
DD
pin to balance current in the MOSFET bond wires. Figure 7
shows a recommended layout for the LTC4232-1.
Although the MOSFET is self protected from overtem
-
perature, it is recommended to solder the backside of the
package to a copper trace to provide a good heat sink.
Note that the backside is connected to the SENSE pin and
cannot be soldered to the ground plane. During normal loads
the power dissipated in the MOSFET is as high as 1.9W.
A
10mm
×
10mm area of 1oz copper should be sufficient.
This area of copper can be divided in many layers.
It is also important to put C1, the bypass capacitor for
the INTV
CC
pin as close as possible between the INTV
CC
and GND.
LTC4232-1
15
42321fb
For more information www.linear.com/LTC4232-1
applicaTions inForMaTion
Additional Applications
The LTC4232-1 has a wide operating range from 2.9V to
15V. The UV, OV and PG thresholds are set with few resis
-
tors. All other functions are independent of supply voltage.
In addition to Hot Swap applications, the LTC4232-1 also
functions as a backplane resident switch for removable
load cards (see Figure 8.)
The last page shows a 3.3V application with a UV threshold
of 2.87V, an OV threshold of 3.77V and a PG threshold
of 3.05V.
Figure 8. 12V, 5A Backplane Resident Application with Insertion Activated Turn-On
UV = 9.88V
OV = 15.2V
PG = 10.5V
R5
150k
R6
20k
R
GATE
100k
ADC
C1
F
R
MON
20k
42321 F08
C
GATE
4.7nF
C
COMP
3.3nF
C
T
0.1µF
V
DD
PG
OUT
FB
UV
GND
I
MON
I
SET
GATE
LTC4232DHC-1
OV
INTV
CC
TIMER
F LT
V
OUT
12V
5A
12V
R7
10k
R1
226k
R2
20k
12V
R4
20k
R3
140k
LOAD
*TVS Z1: DIODES INC. SMAJ17A
Z1*

LTC4232IDHC-1#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Hot Swap Voltage Controllers 2.9V to 15V, 5A Integrated Hot Swap Controller with 16ms Turn-On Delay
Lifecycle:
New from this manufacturer.
Delivery:
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