APRIL 2001 REVISED JULY 2008
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
Absolute Maximum Ratings, T
J
= 25 °C (Unless Otherwise Noted)
TISP61521 SLIC Protector
Description (continued)
The SLIC line driver section is typically powered from 0 V (ground) and a negative voltage in the region of -20 V to -150 V. The protector gate is
connected to this negative supply. This references the protection (clipping) voltage to the negative supply voltage. The protection voltage will
then track the negative supply voltage and the overvoltage stress on the SLIC is minimized.
Positive overvoltages are clipped to ground by diode forward conduction. Negative overvoltages are initially clipped close to the SLIC negative
supply rail value. If sufficient current is available from the overvoltage, then the protector will switch into a low voltage on-state condition. As
the overvoltage subsides, the high holding current of TISP61521 crowbar helps prevent d.c. latchup.
These monolithic protection devices are fabricated in ion-implanted planar vertical power structures for high reliability and in normal system
operation they are virtually transparent. The TISP61521 buffered gate design reduces the loading on the SLIC supply during overvoltages
caused by power cross and induction. The TISP61521 is available in an 8-pin plastic small-outline surface mount package.
NOTES: 1. These voltage ratings are set by the -150 V maximum supply voltage plus the 12 V diode overshoot (V
GKRM
) and the 25 V SCR
overshoot (V
DRM
).
2. Initially, the protector must be in thermal equilibrium. The surge may be repeated after the device returns to its initial conditions. The
rated current values may be applied either to the Ring to Ground or to the Tip to Ground terminal pairs. Additionally, both terminal
pairs may have their rated current values applied simultaneously (in this case, the Ground terminal current will be twice the rated
current value of an individual terminal pair).
3. Values for V
GG
= -48 V. For values at other voltages, see Figure 2.
Rating Symbol Value Unit
Repetitive peak off-state voltage, V
GK
=0, -40°C
≤
T
J
≤
85 °C (see Note 1) V
DRM
-175 V
Repetitive peak gate-cathode voltage, V
KA
=0, -40°C ≤ T
J
≤ 85 °C (see Note 1) V
GKRM
-162 V
Non-repetitive peak on-state pulse current (see Note 2)
I
TSP
A
2/10 µs (GR-1089-CORE, 2/10 µs voltage waveshape) 170
1/20 µs (K.22, VDE0878, 1.2/50 voltage waveshape) 50
8/20 µs (IEC 61000-4-5, combination wave generator, 1.2/50 voltage, 8/20 current) 100
10/160 µs (FCC Part 68, 10/160 µs voltage waveshape) 50
0.2/310 µs (I3124, 0.5/700 µs voltage waveshape) 40
5/310 µs (VDE 0433, 10/700 µs voltage waveshape) 40
5/310 µs (ITU-T K.20/21, K.44 10/700 µs voltage wave shape) 40
5/320 µs (FCC Part 68, 9/720 µs voltage waveshape) 40
10/560 µs (FCC Part 68, 10/560 µs voltage waveshape) 35
10/1000 µs (GR-1089-CORE, 10/1000 µs voltage waveshape) 30
Non-repetitive peak on-state current, 50 Hz (see Notes 2 and 3)
I
TSM
A0.01 s 15
1s 5
Non-repetitive peak gate current, 10 ms half-sine wave, cathodes commoned (see Notes 1 and
2)
I
GSM
+2 A
Junction temperature T
J
-40 to +150 °C
C
Storage temperature range T
stg
-65 to +150 °
