ISL9120IR
8
FN8743.1
February 2, 2016
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Functional Description
Functional Overview
Refer to the “Block Diagram” on page 2. The ISL9120IR
implements a complete buck-boost switching regulator with a
PFM controller, internal switches, references, protection circuitry
and control inputs.
The PFM controller automatically switches between buck and
boost modes as necessary to maintain a steady output voltage
with changing input voltages and dynamic external loads.
Internal Supply and References
Referring to the “Block Diagram” on page 2, the VIN pin supplies
input power to the DC/DC converter and also provides the
operating voltage source required for stable V
REF
generation.
Separate ground pins (GND and PGND) are provided to avoid
problems caused by ground shift due to the high switching
currents.
Enable Input
A master enable pin, EN, allows the device to be enabled. Driving
EN logic low invokes a power-down mode, where most internal
device functions, including input and output power-good
detection, are disabled.
Bypass Input
The BYPS pin allows the device to provide a direct connection
from the VIN pin to the VOUT pin. The connection between the
VIN and VOUT pins is through the external inductor and two
internal power transistors. This function, called forced bypass
mode operation, provides a very low quiescent current state.
For forced bypass mode operation, the minimum time required
while in forced bypass operation is 800µs. Also when exiting
forced bypass operation, the minimum time required before
reentering forced bypass mode operation is 1ms.
Soft Discharge
When the device is disabled by driving EN logic low, an internal
resistor between the VOUT and GND pins is activated. This
internal resistor has a typical resistance of 110Ω.
POR Sequence and Soft-Start
Bringing the EN pin logic high allows the device to power-up. A
number of events occur during the start-up sequence. The internal
voltage reference powers up and stabilizes. The device then starts
operating. There is a 1ms (typical) delay between assertion of the
EN pin and the start of the switching regulator soft-start ramp.
The soft-start feature minimizes output voltage overshoot and
input inrush currents. During soft-start, the reference voltage is
ramped to provide a ramping output voltage.
When the target output voltage is higher than the input voltage,
there will be a transition from buck mode to boost mode during
the soft-start sequence. At the time of this transition, the ramp
rate of the reference voltage is decreased, such that the output
voltage slew rate is decreased. This provides a slower output
voltage slew rate.
Undervoltage Lockout
The Undervoltage Lockout (UVLO) feature prevents abnormal
operation in the event that the supply voltage is too low to
guarantee proper operation. When the VIN pin voltage falls below
the UVLO threshold, the regulator is disabled.
Thermal Shutdown
A built-in thermal protection feature protects the ISL9120IR if
the die temperature reaches +150°C (typical). At this die
temperature, the regulator is completely shut down. The die
temperature continues to be monitored in this thermal shutdown
mode. When the die temperature falls to +115°C (typical), the
device will resume normal operation.
When exiting thermal shutdown, the ISL9120IR will execute its
soft-start sequence.
Buck-Boost Conversion Topology
The ISL9120IR operates in either buck or boost mode. When
operating in conditions where V
IN
is close to V
OUT
, the ISL9120IR
alternates between buck mode, boost mode and automatic
bypass modes of operation as necessary to provide a regulated
output voltage.
Figure 14
shows a simplified diagram of the internal switches
and external inductor.
PFM Operation
During PFM operation in buck mode, Switch D is continuously
closed and Switch C is continuously open. Switches A and B operate
in discontinuous mode during PFM operation. During PFM operation
in boost mode, the ISL9120IR closes Switch A and Switch C to
ramp-up the current in the inductor. When inductor current reaches
the current limit, the device turns OFF Switches A and C, then turns
ON Switches B and D. With Switches B and D closed, output voltage
increases as the inductor current ramps down.
As shown in Figure 15 on page 9
, depending on output current,
there will be multiple PFM pulses to charge up the output capacitor.
These pulses continue until V
OUT
has reached the upper threshold of
the PFM hysteretic, which is at 1.5% above the nominal output
voltage. Switching then stops and remains stopped until V
OUT
decays to the lower threshold of the voltage hysteretic, which is the
nominal output voltage. Then the PFM operation repeats.
FIGURE 14. BUCK-BOOST TOPOLOGY
VIN VOUT
SWITCH A SWITCH D
SWITCH B SWITCH C
LX1 LX2
L
1
