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74ALVCH16823DL,518

P1-P3P4-P6P7-P9P10-P12P13-P13
Philips Semiconductors Product specification
74ALVCH16823
18-bit D-type flip-flop (3-State)
1998 Jul 29
6
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V).
LIMITS
SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C UNIT
MIN TYP
1
MAX
V
CC
= 1.2V V
CC
V
IH
HIGH level In
p
ut voltage
V
CC
= 1.8V 0.7*V
CC
0.9
V
V
IH
HIGH
level
In ut
voltage
V
CC
= 2.3 to 2.7V 1.7 1.2
V
V
CC
= 2.7 to 3.6V 2.0 1.5
V
CC
= 1.2V – GND
V
IL
LOW level In
p
ut voltage
V
CC
= 1.8V 0.9 0.2*V
CC
V
V
IL
LOW
level
In ut
voltage
V
CC
= 2.3 to 2.7V 1.2 0.7
V
V
CC
= 2.7 to 3.6V 1.5 0.8
V
CC
=18to36V
;
V
I
=V
IH
or V
IL
;
I
O
= –100µA
V
CC
02
V
CC
–
V
CC
=
1
.
8
to
3
.
6V;
V
I
=
V
IH
or
V
IL
;
I
O
= –
100µA
V
CC
0
.
2
V
CC
–
V
CC
= 1.8V; V
I
= V
IH
or V
IL
; I
O
= –6mA V
CC
0.4 V
CC
0.10 –
V
CC
= 2.3V; V
I
= V
IH
or V
IL
; I
O
= –6mA V
CC
0.3 V
CC
0.08 –
V
OH
HIGH level output voltage V
CC
= 2.3V; V
I
= V
IH
or V
IL
; I
O
= –12mA V
CC
0.5 V
CC
0.17 – V
V
CC
= 2.3V; V
I
= V
IH
or V
IL
; I
O
= –18mA V
CC
0.6 V
CC
0.26 –
V
CC
= 2.7V; V
I
= V
IH
or V
IL
; I
O
= –12mA V
CC
0.5 V
CC
0.14 –
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= –24mA V
CC
1.0 V
CC
0.28 –
V
CC
=18to36V
;
V
I
=V
IH
or V
IL
;
I
O
= 100µA
GND
020
V
CC
=
1
.
8
to
3
.
6V;
V
I
=
V
IH
or
V
IL
;
I
O
=
100µA
GND
0
.
20
V
CC
= 1.8V; V
I
= V
IH
or V
IL
; I
O
= 6mA 0.09 0.30
V
CC
= 2.3V; V
I
= V
IH
or V
IL
; I
O
= 6mA 0.07 0.20
V
OL
LOW level output voltage V
CC
= 2.3V; V
I
= V
IH
or V
IL
; I
O
= 12mA 0.15 0.40 V
V
CC
= 2.3V; V
I
= V
IH
or V
IL
; I
O
= 18mA 0.23 0.60
V
CC
= 2.7V; V
I
= V
IH
or V
IL
; I
O
= 12mA 0.14 0.40
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 24mA 0.27 0.55
I
I
Input leakage current per
control pin
V
CC
= 1.8 to 3.6V;
V
I
= 5.5V or GND
0.1 5
µA
I
I
Input leakage current per data
pin
V
CC
= 1.8 to 3.6V;
V
I
= V
CC
or GND
0.1 5
µA
I
IHZ
/I
ILZ
Input current for common I/O
V
CC
= 1.8 to 2.7V;
V
I
= V
CC
or GND
0.1 10
µA
I
IHZ
/I
ILZ
pins
V
CC
= 3.6V;
V
I
= V
CC
or GND
0.1 15
µA
I
OZ
3-State output OFF-state
V
CC
= 1.8 to 2.7V; V
I
= V
IH
or V
IL
;
V
O
= V
CC
or GND
0.1 5
µA
I
OZ
current
V
CC
= 2.7 to 3.6V; V
I
= V
IH
or V
IL
;
V
O
= V
CC
or GND
0.1 10
µA
∆I
CC
Additional quiescent supply
current given per data I/O pin
V
CC
= 2.7V to 3.6V; V
I
= V
CC
– 0.6V; I
O
= 0 150 750 µA
I
BHL
Bus hold LOW sustaining
V
CC
= 2.3V; V
I
= 0.7V
2
45 –
µA
I
BHL
g
current
V
CC
= 3.0V; V
I
= 0.8V
2
75 150
µA
I
BHH
Bus hold HIGH sustaining
V
CC
= 2.3V; V
I
= 1.7V
2
–45
µA
I
BHH
g
current
V
CC
= 3.0V; V
I
= 2.0V
2
–75 –175
µA
I
BHLO
Bus hold LOW overdrive current
V
CC
= 2.7V
2
300
µA
I
BHLO
Bus
hold
LOW
overdrive
current
V
CC
= 3.6V
2
450
µA
I
BHHO
Bus hold HIGH overdrive
V
CC
= 2.7V
2
–300
µA
I
BHHO
current
V
CC
= 3.6V
2
–450
µA
NOTES:
1. All typical values are at T
amb
= 25°C.
2. Valid for data inputs of bus hold parts.
Philips Semiconductors Product specification
74ALVCH16823
18-bit D-type flip-flop (3-State)
1998 Jul 29
7
AC CHARACTERISTICS FOR V
CC
= 2.3V TO 2.7V RANGE AND V
CC
< 2.3V
GND = 0V; t
r
= t
f
≤ 2.0ns; C
L
= 30pF
LIMITS
SYMBOL PARAMETER WAVEFORM V
CC
= 2.3 to 2.7V V
CC
= 1.8V V
CC
= 1.2V UNIT
MIN TYP
1,
2
MAX MIN TYP1 MAX TYP
1
t
PLH
/t
PHL
Propagation delay
nCP to nQ
n
1, 5 1.0 2.8 4.9 1.5 4.5 7.5 10.6 ns
t
PLH
/t
PHL
Propagation delay
nMR to nQ
n
2, 5 1.0 2.9 5.0 1.5 4.6 7.4 9.9 ns
t
PZH
/t
PZL
3-State output enable time
nOE
n
to nQ
n
4, 5 1.0 2.8 5.3 1.5 4.4 7.7 10.4 ns
t
PHZ
/t
PLZ
3-State output disable time
nOE
n
to nQ
n
4, 5 1.0 2.2 4.1 1.5 3.3 5.5 6.7 ns
t
W
nCP pulse width 1, 5 3.0 1.6 4.0 2.0
ns
t
W
nMR pulse width, LOW 3, 5 3.0 0.4 4.0 0.8
ns
t
SU
Set up time nD
n
to nCP
35
1.2 0.2 1.5 0.2
ns
t
SU
Set up time nCE to nCP
3
,
5
1.8 –0.2 2.0 –0.2
ns
t
h
Hold time nD
n
to nCP
35
0.8 –0.1 0.6 –0.2
ns
t
h
Hold time nCE to nCP
3
,
5
0.3 0.2 0.3 0.2
ns
t
rec
Recovery time nMR to nCP 2, 5 1.0 0.3 0.8 0.2 ns
F
max
Maximum clock pulse frequency 1, 5 150 300 125 250 MHz
NOTE:
1. All typical values are measured at T
amb
= 25°C.
2. Typical value is measured at V
CC
= 2.5V.
AC CHARACTERISTICS FOR V
CC
= 3.0V TO 3.6V RANGE AND V
CC
= 2.7V
GND = 0V; t
r
= t
f
≤ 2.5ns; C
L
= 50pF
LIMITS
SYMBOL PARAMETER WAVEFORM V
CC
= 3.0 ± 0.3V V
CC
= 2.7V UNIT
MIN TYP
1,
2
MAX MIN TYP
1
MAX
t
PLH
/t
PHL
Propagation delay
nCP to nQ
n
1, 5 1.0 2.5 3.7 1.0 2.7 4.3 ns
t
PLH
/t
PHL
Propagation delay
nMR to nQ
n
2, 5 1.0 2.6 4.0 1.0 3.1 4.6 ns
t
PZH
/t
PZL
3-State output enable time
nOE
n
to nQ
n
4, 5 1.0 2.5 4.3 1.0 3.1 5.2 ns
t
PHZ
/t
PLZ
3-State output disable time
nOE
n
to nQ
n
4, 5 1.0 2.8 3.9 1.0 3.1 4.3 ns
t
W
nCP pulse width HIGH or LOW 1, 5 2.5 1.4 3.0 1.6
ns
t
W
nMR pulse width HIGH or LOW 3, 5 2.5 0.3 3.0 0.6
ns
t
SU
Set up time nD
n
to nCP
35
1.2 0.2 1.5 0.4
ns
t
SU
Set up time nCE to nCP
3
,
5
1.5 –0.1 1.9 –0.1
ns
t
h
Hold time nD
n
to nCP
35
0.8 0.0 0.6 –0.2
ns
t
h
Hold time nCE to nCP
3
,
5
0.5 0.1 0.4 0.1
ns
t
rec
Recovery time nMR to nCP 2, 5 1.0 0.2 0.8 0.1 ns
F
max
Maximum clock pulse frequency 1, 5 200 350 150 300 MHz
NOTES:
1. All typical values are measured at T
amb
= 25°C.
2. Typical value is measured at V
CC
= 3.3V.
Philips Semiconductors Product specification
74ALVCH16823
18-bit D-type flip-flop (3-State)
1998 Jul 29
8
AC WAVEFORMS FOR V
CC
= 2.3V TO 2.7V AND
V
CC
< 2.3V RANGE
V
M
= 0.5 V
CC
V
X
= V
OL
+ 0.15V
V
Y
= V
OH
–0.15V
V
OL
and V
OH
are the typical output voltage drop that occur with the
output load.
V
I
= V
CC
AC WAVEFORMS FOR V
CC
= 3.0V TO 3.6V AND
V
CC
= 2.7V RANGE
V
M
= 1.5 V
V
X
= V
OL
+ 0.3V
V
Y
= V
OH
–0.3V
V
OL
and V
OH
are the typical output voltage drop that occur with the
output load.
V
I
= 2.7V
V
M
SH00017
nCP
nQn
V
M
t
w
t
PHL
V
M
t
PLH
1/f
MAX
V
M
3.0V or V
CC
whichever
is less
0V
0V
V
OH
Waveform 1. Clock (nCP) to Output (nQn) Propagation Delays,
Clock Pulse Width, and Maximum Clock Pulse Frequency
V
M
nMR
V
M
nQn
t
w
V
M
t
PHL
V
M
nCP
SH00018
3.0V or V
CC
whichever
is less
0V
3.0V or V
CC
whichever
is less
0V
0V
V
OH
t
REC
Waveform 2. Master Reset (MR) Pulse WIdth, MR to
Output propagation Delay and MR
to Clock Recovery Time
nQ
n
OUTPUT
V
M
V
M
nCE, nD
n
INPUT
nCP INPUT
V
M
GND
V
I
GND
V
I
V
OL
V
OH
t
su
t
su
t
h
t
h
SH00155
NOTE: The data set-up and hold times for D
n
or CE input to the CP input
Waveform 3. Data Setup and Hold Times for the D
n
or CE input
to the CP input
t
PLZ
t
PZL
V
I
nOE INPUT
GND
V
CC
OUTPUT
LOW-to-OFF
OFF-to-LOW
V
OL
V
OH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
outputs
enabled
outputs
enabled
outputs
disabled
t
PHZ
V
M
V
M
V
M
t
PZH
V
X
V
Y
SW00308
Waveform 4. 3-State Enable and Disable Times
TEST CIRCUIT
PULSE
GENERATOR
R
T
V
IN
D.U.T.
V
OUT
C
L
V
CC
R
L
=500 Ω
SWITCH POSITION
TEST SWITCH
t
PLH
/t
PHL
Open
t
PLZ
/t
PZL
2V
CC
t
PHZ
/t
PZH
GND
Test Circuit for 3-State Outputs
Open
GND
S
1
2V
CC
DEFINITIONS
V
CC
2.7V
2.7 – 3.6V
V
IN
V
CC
2.7V
R
L
= Load resistor
C
L
= Load capacitance includes jig and probe capacitance
R
T
= Termination resistance should be equal to Z
OUT
of pulse generators.
SW00047
R
L
=500 Ω
Waveform 5. Load circuitry for switching times
P1-P3P4-P6P7-P9P10-P12P13-P13

74ALVCH16823DL,518

Mfr. #:
Buy 74ALVCH16823DL,518
Manufacturer:
Nexperia
Description:
Flip Flops 18-BIT BUS INTERFACE
Lifecycle:
New from this manufacturer.
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