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Document Number:
T2080FS REV 2
Four dual-threaded
e6500 cores built on
Power Architecture
®
technology
• Up to 1.8 GHz, 6.0 DMIPS/MHz per core
• Shares a 2 MB L2 cache
• Three levels of instructions: User, supervisor, hypervisor
• Hybrid 32-bit mode to support legacy software and transition to a 64-bit
architecture
• Advanced power saving modes include state retention power gating
CoreNet platform
cache
• 512 KB shared platform cache with prefetch engine
Hierarchical
interconnect fabric
• CoreNet fabric supporting coherent and non-coherent transactions with
prioritization and bandwidth allocation amongst CoreNet endpoints
Memory controller
• 64-bit DDR3/3L SDRAM up to 2133 MT/s
• 72-bit width including ECC
DPAA incorporating
acceleration for the
following functions
• Packet parsing, classification and distribution to 24 Gb/s (FMAN)
• Queue management for scheduling, packet sequencing and congestion
management of up to 224 queues (QMAN)
• Hardware buffer management for buffer allocation and de-allocation with 64
buffer pools (BMAN)
• Cryptography acceleration to 10 Gb/s (SEC)
• Decompression/compression acceleration at up to 17.5 Gb/s (DCE)
• DPAA chip-to-chip interconnect via RapidIO® message manager (RMAN)
(T2080 only)
• Pattern matching acceleration to 10 Gb/s (PME)
SerDes • 16 lanes at up to 10 GHz (8 on T2081)
Ethernet interfaces
• Quality of service: Egress traffic shaping and priority flow control for data
center bridging in converged data center applications
• 8 MACs (7 on T2081), multiplexed over the following options:
• Up to four 10 Gb/s MACs supporting XFI/KR, XAUI and HiGig
• (two on T2081 supporting XFI/KR only)
• Up to eight 1 Gb/s MACs (5 on T2080) supporting SGMII
• Up to two 2.5 Gb/s SGMII
• Up to two RGMII
High-speed peripheral
interfaces
• Two PCI Express 3.0 controllers (one on T2081)
• Two PCI Express 2.0 controllers (three on T2081)
• Endpoint SR-IOV
• Two Serial RapidIO 2.1 controllers/ports running at up to 5 GHz with Type
11 messaging and Type 9 data streaming support (T2080 only)
Additional peripheral
interfaces
• Two serial ATA (SATA 2.0) controllers (T2080 only)
• Two High-Speed USB 2.0 controllers with integrated PHYs
• Enhanced secure digital host controller (SD/MMC/eMMC)
• Enhanced serial peripheral interface
• Four I
2
C controllers
• Four UARTS
• Integrated flash controller supporting NAND and NOR flash memory
DMA • Dual eight channel
Support for hardware
virtualization
and partitioning
enforcement
• Extra privileged level for hypervisor support
• Logical to real address translation
• Virtual core aware MMU/TLB
• vMPIC (virtualized interrupt controller)/virtual core capable PPC cores
• vDMA (user level DMA engine)
• PAMU v2 (I/O MMU supporting paging)
• DPAA (Ethernet MAC virtualization, accelerator virtualization)
QorIQ trust
architecture
• Secure boot, secure debug, tamper detection (T2080 only), volatile key
storage, alternate image and key revocation
T2080 AND T2081 FEATURES LISTSOFTWARE AND TOOL SUPPORT
NXP and our partner network deliver a
wide range of tools, run-time software,
reference solutions and services to
accelerate your designs.
} QorIQ T2080 reference design board
(T2080RDB)
} CodeWarrior Development Studio for
Power Architecture
} NXP Linux SDK
} VortiQa Application Software
– VortiQa Application Identification
Software (AIS)
– Enterprise Software for Networking
– VortiQa open network switch
software
– VortiQa open network director
software
} Professional Services & Support
– Commercial Services
– Linux SDK Support Package
– Reference Design Software (RDS)
Support Package
} Third Party Software and Tools
– Enea, Green Hills, Mentor Graphics
and Wind River