74HC125D

74HC125D,74HC126D
1
CMOS Digital Integrated Circuits Silicon Monolithic
74HC125D,74HC126D
74HC125D,74HC126D
74HC125D,74HC126D
74HC125D,74HC126D
Start of commercial production
2016-02
1.
1.
1.
1. Functional Description
Functional Description
Functional Description
Functional Description
Quad Bus Buffer, Non-Inverted 3-State Outputs
74HC125D: Quad Bus Buffer
74HC126D: Quad Bus Buffer
2.
2.
2.
2. General
General
General
General
The 74HC125D,74HC126D are high speed CMOS QUAD BUS BUFFERs fabricated with silicon gate C
2
MOS
technology.
They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power
dissipation.
The 74HC125D requires the 3-state control input G to be set high to place the output into the high impedance
state, whereas the 74HC126D requires the control input to be set low to place the output into high impedance.
All inputs are equipped with protection circuits against static discharge or transient excess voltage.
3.
3.
3.
3. Features
Features
Features
Features
(1) High speed: t
pd
= 10 ns (typ.) at V
CC
= 6.0 V
(2) Low power dissipation: I
CC
= 4.0 µA (max) at T
a
= 25
(3) Balanced propagation delays: t
PLH
t
PHL
(4) Wide operating voltage range: V
CC(opr)
= 2.0 to 6.0 V
4.
4.
4.
4. Packaging
Packaging
Packaging
Packaging
SOIC14
2016-08-04
Rev.4.0
©2016 Toshiba Corporation
74HC125D,74HC126D
2
5.
5.
5.
5. Pin Assignment
Pin Assignment
Pin Assignment
Pin Assignment
74HC125D 74HC126D
6.
6.
6.
6. Marking
Marking
Marking
Marking
74HC125D 74HC126D
7.
7.
7.
7. IEC Logic Symbol
IEC Logic Symbol
IEC Logic Symbol
IEC Logic Symbol
74HC125D 74HC126D
2016-08-04
Rev.4.0
©2016 Toshiba Corporation
74HC125D,74HC126D
3
8.
8.
8.
8. Truth Table
Truth Table
Truth Table
Truth Table
Input G
(74HC125D)
H
L
L
Input G
(74HC126D)
L
H
H
Input A
X
L
H
Output Y
Z
L
H
X: Don't care
Z: High impedance
9.
9.
9.
9. Absolute Maximum Ratings (Note)
Absolute Maximum Ratings (Note)
Absolute Maximum Ratings (Note)
Absolute Maximum Ratings (Note)
Characteristics
Supply voltage
Input voltage
Output voltage
Input diode current
Output diode current
Output current
V
CC
/ground current
Power dissipation
Storage temperature
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
P
D
T
stg
Note
(Note 1)
Rating
-0.5 to 7.0
-0.5 to V
CC
+ 0.5
-0.5 to V
CC
+ 0.5
±20
±20
±35
±75
500
-65 to 150
Unit
V
V
V
mA
mA
mA
mA
mW
Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even
destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
Note 1: P
D
derates linearly with -8 mW/ above 85
10.
10.
10.
10. Operating Ranges (Note)
Operating Ranges (Note)
Operating Ranges (Note)
Operating Ranges (Note)
Characteristics
Supply voltage
Input voltage
Output voltage
Operating temperature
Inputriseandfalltimes
Symbol
V
CC
V
IN
V
OUT
T
opr
t
r
,t
f
Test Condition
Rating
2.0 to 6.0
0 to V
CC
0 to V
CC
-40 to 125
0 to 50
Unit
V
V
V
µs
Note: The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either V
CC
or GND.
2016-08-04
Rev.4.0
©2016 Toshiba Corporation

74HC125D

Mfr. #:
Manufacturer:
Nexperia
Description:
Buffers & Line Drivers QUAD 3-STATE BUS BUF
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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