AD8582ARZ

AD8582
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 617/329-4700 Fax: 617/326-8703
a
FUNCTIONAL BLOCK DIAGRAM
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
The high speed parallel data interface connects to the fastest
processors without wait states. The double-buffered input struc-
ture allows the user to load the input registers one at a time,
then a single load strobe tied to both LDA + LDB inputs will
update both DAC outputs simultaneously. LDA and LDB can
also be activated independently to immediately update their re-
spective DAC registers. An address input decodes DAC A or
DAC B when the chip select
CS input is strobed. An asynchro-
nous reset input sets the output to zero scale. The MSB bit can
be used to establish a preset to midscale when the reset input is
strobed.
The AD8582 is available in the 24-pin plastic DIP and the sur-
face mount SOIC-24. Each part is fully specified for operation
over –40°C to +85°C, and the full +5 V ± 5% power supply
range.
FEATURES
Complete Dual 12-Bit DAC
No External Components
Single +5 Volt Operation
1 mV/Bit with 4.095 V Full Scale
True Voltage Output, ±5 mA Drive
Very Low Power: 5 mW
APPLICATIONS
Digitally Controlled Calibration
Portable Equipment
Servo Controls
Process Control Equipment
PC Peripherals
+5 Volt, Parallel Input
Complete Dual 12-Bit DAC
GENERAL DESCRIPTION
The AD8582 is a complete, parallel input, dual 12-bit, voltage
output DAC designed to operate from a single +5 volt supply.
Built using a CBCMOS process, this monolithic DAC offers the
user low cost, and ease-of-use in +5 volt only systems.
Included on the chip, in addition to the DACs, are a rail-to-rail
amplifier, latch and reference. The reference (V
REF
) is trimmed
to 2.5 volts output, and the on-chip amplifier gains up the DAC
output to 4.095 volts full scale. The user needs only supply a +5
volt supply.
The AD8582 is coded natural binary. The op amp output
swings from 0 volt to +4.095 volts for a one-millivolt-per-bit
resolution, and is capable of driving ±5 mA. Operation down to
4.3 V is possible with output load currents less than 1 mA.
DATA
REFERENCE
12-BIT
DAC A
DAC A
REGISTER
INPUT A
REGISTER
12-BIT
DAC B
DAC B
REGISTER
INPUT B
REGISTER
12
12
2
12
V
DD
V
OUTA
V
OUTB
V
REF
AGND
DGND
MSB
RST
LDA
CS
A/B
LDB
AD8582
OUTPUT LOAD CURRENT – mA
V
DD
MIN – Volts
5.0
4.4
4.0
0.01
0.1 100101.0
4.2
4.6
4.8
VFS
1 LSB
DATA = FFF
H
T
A
= +25
°
C
PROPER OPERATION
WHEN V
DD
SUPPLY
VOLTAGE ABOVE
CURVE
Figure 1. Minimum Supply Voltage vs. Load
2.0
–2.0
4096
–1.0
–1.5
0
0.0
–0.5
0.5
1.0
1.5
307220481024
DIGITAL INPUT CODE – Decimal
LINEARITY ERROR – LSB
V
DD
= +5V
T
A
= –55°C, +25°C, +85°C
= +25°C & +85°C
= –55°C
Figure 2. Linearity Error vs. Digital Code and Temperature
AD8582* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
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DOCUMENTATION
Data Sheet
AD8582: 5 Volt, Parallel Input Complete Dual 12-Bit DAC
Data Sheet
REFERENCE MATERIALS
Solutions Bulletins & Brochures
Digital to Analog Converters ICs Solutions Bulletin
DESIGN RESOURCES
AD8582 Material Declaration
PCN-PDN Information
Quality And Reliability
Symbols and Footprints
DISCUSSIONS
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SAMPLE AND BUY
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TECHNICAL SUPPORT
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number.
DOCUMENT FEEDBACK
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AD8582–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
REV. 0
–2–
(@ V
DD
= +5.0 V ± 5%, R
L
= No Load, –40°C T
A
+85°C, unless otherwise noted)
Parameter Symbol Condition Min Typ Max Units
STATIC PERFORMANCE
Resolution N Note 1 12 Bits
Relative Accuracy INL –2 ±3/4 +2 LSB
Differential Nonlinearity DNL Monotonic –1 ±3/4 +1 LSB
Zero-Scale Error V
ZSE
Data = 000
H
+0.2 +3 mV
Full-Scale Voltage V
FS
Data = FFF
H
,
2
4.079 4.095 4.111 V
Full-Scale Tempco TCV
FS
Notes 2 and 3 ±16 ppm/°C
MATCHING PERFORMANCE
Linearity Matching Error V
FS
A/B ±1 LSB
REFERENCE OUTPUT
Output Voltage V
REF
2.484 2.500 2.516 V
Output Source Current I
REF
Note 4 –5 mA
Line Rejection LN
REJ
0.08 %/V
Load Regulation LD
REG
I
REF
= 0 mA to 5 mA 0.1 %/mA
ANALOG OUTPUT
Output Current I
OUT
Data = 800
H
±5mA
Load Regulation at Half Scale LD
REG
R
L
= 402 to , Data = 800
H
1 3 LSB
Capacitive Load C
L
No Oscillation
3
500 pF
DYNAMIC CHARACTERISTICS
3
Crosstalk C
T
>64 dB
Voltage Output Settling Time
5
t
S
To ±1 LSB of Final Value 16 µs
Digital Feedthrough F
T
Signal Measured at DAC Output, While 35 nV s
Changing Data (LDA = LDB = “1”)
LOGIC INPUTS
Logic Input Low Voltage V
IL
0.8 V
Logic Input High Voltage V
IH
2.4 V
Input Leakage Current I
IL
10 µA
Input Capacitance C
IL
Note 3 10 pF
TIMING SPECIFICATIONS
3, 6
Chip Select Pulse Width t
CSW
30 ns
DAC Select Setup t
AS
30 ns
DAC Select Hold t
AH
0ns
Data Setup t
DS
30 ns
Data Hold t
DH
10 ns
Load Setup t
LS
20 ns
Load Hold t
LH
10 ns
Load Pulse Width t
LDW
20 ns
Reset Pulse Width t
RSW
30 ns
SUPPLY CHARACTERISTICS
Positive Supply Current I
DD
V
IH
= 2.4 V, V
IL
= 0.8 V 4 7 mA
V
IL
= 0 V, V
DD
= +5 V 1 2 mA
Power Dissipation
7
P
DISS
V
IH
= 2.4 V, V
IL
= 0.8 V 20 35 mW
V
IL
= 0 V, V
DD
= +5 V 5 10 mW
Power Supply Sensitivity PSS V
DD
= ±5% 0.002 0.004 %/%
NOTES
1
1 LSB = 1 mV for 0 V to +4.095 V output range.
2
Includes internal voltage reference error.
3
These parameters are guaranteed by design and not subject to production testing.
4
Very little sink current is available at the V
REF
pin. Use external buffer if setting up a virtual ground.
5
Settling time is not guaranteed for the first six codes 0 through 5.
6
All input control signals are specified with t
R
= t
F
= 5 ns (10% to 90% of +5 V) and timed from a voltage level of 1.6 V.
7
Power dissipation is a calculated value I
DD
× 5 V.
Specifications subject to change without notice.

AD8582ARZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC 5V Parallel Input Complete Dual 12-Bit
Lifecycle:
New from this manufacturer.
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