ADN2848 Data Sheet
Rev. B | Page 6 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
02746-003
PIN 1
INDICATOR
TOP VIEW
(Not to Scale)
24 IBMON
23 IMMON
22 GND3
21 V
CC
3
LBWSET 1
ASET 2
ERSET 3
32 CCBIAS
20 ALS
19 FAIL
18 DEGRADE
17 CLKSEL
9
10
11
12
13
14
15
16
PSET 4
IMPD 5
IMPDMON 6
GND4 7
V
CC
4 8
31 I
BIAS
30 GND2
29 GND2
28 IMODP
27 GND2
26 IMODN
25 V
CC
2
ADN2848
ERCAP
PAVCAP
V
CC
1
DATAN
DATAP
GND1
CLKP
CLKN
NOTES
1. THE EXPOSED PAD ON THE BOTTOM OF THE PACKAGE
MUST BE CONNECTED TO THE DEVICE GND.
Figure 3. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1 LBWSET Loop Bandwidth Select.
2
ASET
Alarm Threshold Set Pin.
3 ERSET Extinction Ratio Set Pin.
4 PSET Average Optical Power Set Pin.
5 IMPD Monitor Photodiode Input.
6 IMPDMON Mirrored Current from Monitor PhotodiodeCurrent Source.
7 GND4 Supply Ground.
8 V
CC
4 Supply Voltage.
9 ERCAP Extinction Ratio Loop Capacitor.
10 PAVCAP Average Power Loop Capacitor.
11 V
CC
1 Supply Voltage.
12 DATAN Data Negative Differential Terminal.
13 DATAP Data Positive Differential Terminal.
14
GND1
Supply Ground.
15 CLKP Data Clock Positive Differential Terminal. This pin is used if CLKSEL = V
CC
.
16 CLKN Data Clock Negative Differential Terminal. This pin is used if CLKSEL = V
CC
.
17 CLKSEL Clock Select (Active = V
CC
). This pin is used if data is clocked into chip.
18 DEGRADE DEGRADE Alarm Output.
19 FAIL FAIL Alarm Output.
20 ALS Automatic Laser Shutdown.
21 V
CC
3 Supply Voltage.
22 GND3 Supply Ground.
23 IMMON Modulation Current Mirror OutputCurrent Source.
24 IBMON Bias Current Mirror OutputCurrent Source.
25 V
CC
2 Supply Voltage.
26 IMODN Modulation Current Negative Output. Connect this pin via a matching resistor to V
CC
.
27 GND2 Supply Ground.
28 IMODP Modulation Current Positive Output. Connect this pin to the laser diode.
29, 30 GND2 Supply Ground.
31 I
BIAS
Laser Diode Bias CurrentCurrent Sink.
32
CCBIAS
Connected to Vcc When DC-Coupled to Laser Diode; Connected to I
BIAS
When AC-Coupled to Laser
DiodeCurrent Sink.
EP EPAD Exposed Pad. The exposed pad on the bottom of the package must be connected to the device GND.
Data Sheet ADN2848
Rev. B | Page 7 of 12
THEORY OF OPERATION
A laser diode (LD) has current-in to light-out transfer functions, as
shown in Figure 4. Two key characteristics of this transfer function
are the threshold current, I
TH
, and slope in the linear region beyond
the threshold current, referred to as slope efficiency, or LI.
P1
P
AV
P0
OPTICAL POWER
I
TH
P
I
CURRENT
LI =
P
I
ER =
P1
P0
P
AV
=
P1 + P0
2
0
2746-004
Figure 4. Laser Transfer Function
CONTROL
A monitor photodiode, MPD, is required to control the LD. The
MPD current is fed into the ADN2848 to control the power and
extinction ratio, continuously adjusting the bias current and
modulation current in response to the lasers changing
threshold current and light-to-current slope efficiency.
The ADN2848 uses automatic power control, APC, to maintain
a constant average power over time and temperature.
The ADN2848 uses closed-loop extinction ratio control to
allow optimum setting of extinction ratio for every device.
Thus, SONET/SDH interface standards can be met over device
variation, temperature, and laser aging. Closed-loop
modulation control eliminates the need to either overmodulate
the LD or include external components for temperature
compensation. This reduces research and development time
and second sourcing issues caused by characterizing LDs.
Average power and extinction ratio are set using the PSET and
ERSET pins, respectively. Potentiometers are connected
between these pins and ground. The potentiometer R
PSET
is used
to change the average power. The potentiometer R
ERSET
is used
to adjust the extinction ratio. Both PSET and ERSET are kept
1.2 V above GND.
For an initial setup, R
PSET
and R
ERSET
potentiometers can be
calculated using the following formulas:

AV
PSET
I
R
V2.1

AV
CW
CWMPD
ERSET
P
ER
ER
P
I
R
1
1
V2.1
_
where:
I
AV
is the average MPD current.
P
CW
is the dc optical power specified on the laser data sheet.
I
MPD_CW
is the MPD current at that specified P
CW
.
P
AV
is the average power required.
ER is the desired extinction ratio (ER = P1/P0).
Note that I
ERSET
and I
PSET
change from device to device; however,
the control loops determine the actual values. It is not required
to know the exact values for LI or MPD optical coupling.
LOOP BANDWIDTH SELECTION
For continuous operation, the user hardwires the LBWSET pin
high and uses 1 μF capacitors to set the actual loop bandwidth.
These capacitors are placed between the PAVCAP and ERCAP pins
and ground. It is important that these capacitors are low leakage
multilayer ceramics with an insulation resistance greater than
100 GΩ or a time constant of 1000 seconds, whichever is less.
Setting LBSET low and using 47 nF capacitors results in a
shorter loop time constant (a 10× reduction over using 1 μF
capacitors and keeping LBWSET high).
Table 4.
Operation
Mode
LBWSET
Recommended
PAVCAP
Recommended
ERCAP
Continuous
50 Mbps to
1.25 Gbps
High 1 μF 1 μF
Optimized for
1.25 Gbps
Low 47 nF 47 nF
ALARMS
The ADN2848 is designed to allow interface compliance to
ITU-T-G958 (11/94), section 10.3.1.1.2 (transmitter fail) and
section 10.3.1.1.3 (transmitter degrade). The ADN2848 has two
active high alarms, DEGRADE and FAIL. A resistor between
ground and the ASET pin is used to set the current at which
these alarms are raised. The current through the ASET resistor
is a ratio of 100:1 to the FAIL alarm threshold. The DEGRADE
alarm is raised at 90% of this level.
ADN2848 Data Sheet
Rev. B | Page 8 of 12
Example:
mA45mA
50 =
=
DEGRADE
FAIL
Iso
I
μA500
100
mA50
100
===
FAIL
ASET
I
I
kΩ4.2
μA500
2.1V2.1
* ===
ASET
ASET
I
R
*The smallest valid value for R
ASET
is 1.2 kΩ, because this corresponds to the
maximum I
BIAS
of 100 mA.
The laser degrade alarm, DEGRADE, is provided to give a
warning of imminent laser failure if the laser diode degrades
further or if environmental conditions such as increasing
temperature continue to stress the LD.
The laser fail alarm, FAIL, is activated when the transmitter can
no longer be guaranteed to be SONET/SDH compliant. This
occurs when one of the following conditions arise:
The ASET threshold is reached.
The ALS pin is set high. This shuts off the modulation
and bias currents to the LD, resulting in the MPD
current dropping to zero. This gives closed-loop
feedback to the system that ALS has been enabled.
DEGRADE is raised only when the bias current exceeds 90% of
ASET current.
MONITOR CURRENTS
IBMON, IMMON, and IMPDMON are current controlled
current sources from V
CC
. They mirror the bias, modulation,
and MPD current for increased monitoring functionality. An
external resistor to GND gives a voltage proportional to the
current monitored.
If the monitoring function IMPDMON is not required, the
IMPD pin must be grounded and the monitor photodiode
output must be connected directly to the PSET pin.
DATA AND CLOCK INPUTS
Data and clock inputs are ac-coupled (10 nF capacitors
recommended) and terminated via a 100 internal resistor
between DATAP and DATAN and also between the CLKP and
CLKN pins. There is a high impedance circuit to set the
common-mode voltage, which is designed to allow for
maximum input voltage headroom over temperature. It is
necessary that ac coupling be used to eliminate the need for
matching between common-mode voltages.
ADN2848
TO FLIP-FLOPS
50Ω 50Ω
V
REG
R
R = 2.5kΩ, DATA
R = 3kΩ, CLK
400µA TYP
DATAP
DATAN
02746-005
Figure 5. AC Coupling of Data Inputs
For input signals that exceed 500 mV p-p single-ended, it is
necessary to insert an attenuation circuit as shown in Figure 6.
02746-006
DATAP/CLKP
DATAN/CLKN
R3
R1
R2
R
IN
ADN2848
NOTE THAT R
IN
= 100Ω = THE DIFFERENTIAL
INPUT IMPEDANCE OF THE ADN2848.
Figure 6. Attenuation Circuit
CCBIAS
When the laser is used in ac-coupled mode, the CCBIAS pin
and the I
BIAS
pin are tied together (see Figure 9). In dc-coupled
mode, CCBIAS is tied to V
CC
.
I
BIAS
To achieve optimum optical eye quality, a pull-up resistor R
Z
, as
shown in Figure 8 and Figure 9, is required. The recommended
R
Z
value is approximately 200 Ω ~ 500 Ω.
AUTOMATIC LASER SHUTDOWN
The ADN2848 ALS allows compliance to ITU-T-G958 (11/94),
section 9.7. When ALS is logic high, both the bias and the
modulation currents are turned off. Correct operation of ALS is
confirmed by the FAIL alarm being raised when ALS is
asserted. Note that this is the only time that DEGRADE is low
while FAIL is high.
ALARM INTERFACES
The FAIL and DEGRADE outputs have an internal 30 kpull-
up resistor that is used to pull the digital high value to V
CC
.
However, the alarm output can be overdriven with an external
resistor, allowing alarm interfacing to non-V
CC
levels. Non-V
CC
alarm output levels must be below the V
CC
used for the
ADN2848.

ADN2848ACPZ-32

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Laser Drivers 3.3V Dual-Loop 50Mbps-1.25Gbps
Lifecycle:
New from this manufacturer.
Delivery:
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Payment:
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