 | |  | |
| PartNumber | 74LV74D,112 | 74LV74D,118 | 74LV7032APWJ |
| Description | Flip Flops DUAL D-TYPE POS | Flip Flops DUAL D-TYPE POS | Logic Gates Quad 2-input OR gate with Schmitt trigger inputs |
| Manufacturer | Nexperia | Nexperia | Nexperia |
| Product Category | Flip Flops | Flip Flops | Logic Gates |
| RoHS | Y | Y | Y |
| Number of Circuits | 2 | 2 | - |
| Logic Family | LV | LV | LV-A |
| Logic Type | D-Type Edge Triggered Flip-Flop | D-Type Edge Triggered Flip-Flop | - |
| Polarity | Inverting/Non-Inverting | Inverting/Non-Inverting | - |
| Input Type | Single-Ended | Single-Ended | - |
| Propagation Delay Time | 11 ns at 3.3 V | 11 ns at 3.3 V | 9.5 ns |
| High Level Output Current | - 12 mA | - 12 mA | - 12 mA |
| Supply Voltage Min | 1 V | 1 V | 2 V |
| Supply Voltage Max | 5.5 V | 5.5 V | 5.5 V |
| Minimum Operating Temperature | - 40 C | - 40 C | - 40 C |
| Maximum Operating Temperature | + 125 C | + 125 C | + 125 C |
| Mounting Style | SMD/SMT | SMD/SMT | SMD/SMT |
| Package / Case | SO-14 | SO-14 | TSSOP-14 |
| Packaging | Tube | Reel | Reel |
| Height | 1.45 mm | 1.45 mm | - |
| Length | 8.75 mm | 8.75 mm | - |
| Width | 4 mm | 4 mm | - |
| Brand | Nexperia | Nexperia | Nexperia |
| Number of Input Lines | 1 | 1 | 8 Input |
| Number of Output Lines | 1 | 1 | 4 Output |
| Operating Supply Voltage | 3.3 V | 3.3 V | - |
| Product Type | Flip Flops | Flip Flops | Logic Gates |
| Reset Type | Set, Reset | Set, Reset | - |
| Factory Pack Quantity | 57 | 2500 | 2500 |
| Subcategory | Logic ICs | Logic ICs | Logic ICs |
| Part # Aliases | 74LV74D | 74LV74D-T | - |
| Unit Weight | 0.003527 oz | 0.003527 oz | - |
| Product | - | - | Single-Function Gate |
| Logic Function | - | - | OR |
| Number of Gates | - | - | 4 Gate |
| Low Level Output Current | - | - | 12 mA |
| Qualification | - | - | AEC-Q100 |
| Operating Temperature Range | - | - | - 40 C to + 125 C |
| Output Current | - | - | 35 mA |
| Output Voltage | - | - | 5.5 V |
| Pd Power Dissipation | - | - | 500 mW |
| Manufacturer | Part # | Description | RFQ |
|---|---|---|---|
Nexperia |
74LV74PW-Q100J | Flip Flops Dual Dtype flipflop positive-edgetrigger | |
| 74LV74D-Q100J | Flip Flops Dual Dtype flipflop positive-edgetrigger | ||
| 74LV74PW,118 | Flip Flops DUAL D-TYPE POS EDGE-TRIG | ||
| 74LV74D,112 | Flip Flops DUAL D-TYPE POS | ||
| 74LV74D,118 | Flip Flops DUAL D-TYPE POS | ||
| 74LV7032APWJ | Logic Gates Quad 2-input OR gate with Schmitt trigger inputs | ||
| 74LV74DB,118 | Flip Flops DUAL D-TYPE POS | ||
| 74LV74D-Q100J | Flip Flops Dual Dtype flipflop positive-edgetrigge | ||
| 74LV74DB,112 | Flip Flops DUAL D-TYPE POS | ||
| 74LV74D,112 | Flip Flops DUAL D-TYPE POS | ||
| 74LV74PW-Q100J | Flip Flops Dual Dtype flipflop positive-edgetrigge | ||
| 74LV74PW,112 | Flip Flops DUAL D-TYPE POS | ||
| 74LV74D,118 | Flip Flops DUAL D-TYPE POS | ||
| 74LV74PW,118 | Flip Flops DUAL D-TYPE POS EDGE-TRIG | ||
| 74LV74D | IC, 74LV, SMD, 74LV74, SOIC14, 3.3V, Logic Family / Base Number:74LV74, Flip-Flop Type:D, Propagation Delay:23ns, Frequency:76MHz, Output Current:12mA, Logic Case Style:SOIC, No. of Pins:14Pins | ||
| 74LV74D SOP3.9 | New and Original | ||
| 74LV74D.112 | New and Original | ||
| 74LV74D.118 | Flip Flop D-Type Pos-Edge 2-Element 14-Pin SO T/R (Alt: 74LV74D,118) | ||
| 74LV74D112 | Now Nexperia 74LV74D - D Flip-Flop, LV/LV-A/LVX/H Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, PDSO14 | ||
| 74LV74D118 | Now Nexperia 74LV74D - D Flip-Flop, LV/LV-A/LVX/H Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, PDSO14 | ||
| 74LV74DB | Flip Flops DUAL D-TYPE POS EDGE-TRIG | ||
| 74LV74DR | New and Original | ||
| 74LV74N112 | Now Nexperia 74LV74N - D Flip-Flop, LV/LV-A/LVX/H Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, PDIP14 | ||
| 74LV74PW(ROHS) | New and Original | ||
| 74LV74PW-Q100118 | - Bulk (Alt: 74LV74PW-Q100118) | ||
| 74LV74PW-T | New and Original | ||
| 74LV74PW112 | Now Nexperia 74LV74PW - D Flip-Flop, LV/LV-A/LVX/H Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, TSSOP14 | ||
| 74LV74PW118 | Now Nexperia 74LV74PW - D Flip-Flop, LV/LV-A/LVX/H Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, TSSOP14 | ||
| 74LV74PWR | New and Original | ||
| 74LV74PWT | New and Original | ||
| 74LV74N | New and Original | ||
| 74LV74PW | Flip Flops DUAL D-TYPE POS | ||
| 74LV74PW.118 | Flip Flop D-Type Pos-Edge 2-Element 14-Pin TSSOP T/R | ||
| 74LV7032APWJ | Quad 2-input OR gate with Schmitt trigger inputs | ||
| 74LV74DB-T | Flip Flops DUAL D-TYPE POS EDGE-TRIG | ||
| 74LV74PW.112 | IC: digital, D flip-flop, Channels:2, LV, SMD, TSSOP14 | ||
| 74LV74D-T | Flip Flops DUAL D-TYPE POS EDGE-TRIG | ||
NXP Semiconductors |
74LV74N,112 | Flip Flops DUAL D-TYPE POS EDGE-TRIG | |
| 74LV74D/AUJ | Flip Flops Dual Dtype flipflop positive-edgetrigge |