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DC750A-C

DC750A-C
Mfr. #:
DC750A-C
Manufacturer:
Analog Devices Inc.
Description:
Data Conversion IC Development Tools LTC2230CUP - High Speed ADC, VCC = +3.3V
Lifecycle:
New from this manufacturer.
Datasheet:
DC750A-C Datasheet
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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ECAD Model:
More Information:
DC750A-C more Information DC750A-C Product Details
Product Attribute
Attribute Value
Manufacturer:
Analog Devices Inc.
Product Category:
Data Conversion IC Development Tools
RoHS:
Y
Product:
Demonstration Boards
Type:
ADC
Tool Is For Evaluation Of:
LTC2230
Operating Supply Voltage:
3.1 V to 3.5 V
Series:
LTC2230
Brand:
Analog Devices
Product Type:
Data Conversion IC Development Tools
Factory Pack Quantity:
1
Subcategory:
Development Tools
Tags
DC750, DC75, DC7
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We provide 90-360 days warranty.

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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
*** Electronic Components
Data Conversion IC Development Tools LTC2230CUP - High Speed ADC, VCC = +3.3V
***va Crawler
LTC2230CUP | High Speed ADC, VCC = +3.3V, 170Msps, 10-Bit 1MHz < AIN < 100MHz (Requires DC890 and LVDS_TRANSFORMER)
***ical
LTC2230CUP High Speed ADC Demonstration Circuit
***ponent Distributors Inc.
LTC2230 Evaluation Kit(Fin= 1-100MHz)
***log Devices
The LTC2230 and LTC2231 are 170Msps/135Msps, sampling 10-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. The LTC2230/LTC2231 are perfect for demanding communications applications with AC performance that includes 61dB SNR and 75dB spurious free dynamic range for signals up to 200MHz. Ultralow jitter of 0.15psRMS allows undersampling of IF frequencies with excellent noise performance. DC specs include ±0.2LSB INL (typ), ±0.1LSB DNL (typ) and no missing codes over temperature. The transition noise is a low 0.12LSBRMS. The digital outputs can be either differential LVDS, or single-ended CMOS. There are three format options for the CMOS outputs: a single bus running at the full data rate or two demultiplexed buses running at half data rate with either interleaved or simultaneous update. A separate output power supply allows the CMOS output swing to range from 0.5V to 3.6V. The ENC+ and ENC– inputs may be driven differentially or single ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. Applications Wireless and Wired Broadband Communication Cable Head-End Systems Power Amplifier Linearization Communications Test Equipment
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Availability
Stock:
Available
On Order:
3000
Enter Quantity:
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