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74ABT16833DGGRG4

74ABT16833DGGRG4
Mfr. #:
74ABT16833DGGRG4
Description:
Bus Transceivers Dual 8-9B Parity Bus Xceivers
Lifecycle:
New from this manufacturer.
Datasheet:
74ABT16833DGGRG4 Datasheet
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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ECAD Model:
More Information:
74ABT16833DGGRG4 more Information 74ABT16833DGGRG4 Product Details
Product Attribute
Attribute Value
Manufacturer:
Texas Instruments
Product Category:
Bus Transceivers
RoHS:
Y
Logic Family:
ABT
Input Level:
TTL
Output Level:
TTL
Output Type:
3-State
High Level Output Current:
- 32 mA
Low Level Output Current:
64 mA
Supply Voltage - Max:
5.5 V
Supply Voltage - Min:
4.5 V
Minimum Operating Temperature:
- 40 C
Maximum Operating Temperature:
+ 85 C
Package / Case:
TSSOP-56
Packaging:
Reel
Function:
Registered Transceiver with Parity Checker
Height:
1.15 mm
Length:
14 mm
Number of Circuits:
2
Product:
BiCMOS
Quiescent Current:
28 mA
Technology:
BiCMOS
Width:
6.1 mm
Brand:
Texas Instruments
Mounting Style:
SMD/SMT
Number of Channels:
16
Supply Current - Max:
36 mA
Operating Supply Voltage:
4.5 V to 5.5 V
Polarity:
Non-Inverting
Product Type:
Bus Transceivers
Factory Pack Quantity:
1
Subcategory:
Logic ICs
Triggering Type:
Positive Edge
Unit Weight:
0.008917 oz
Tags
74ABT1683, 74ABT168, 74ABT16, 74ABT1, 74ABT, 74AB, 74A
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC DUAL 8-9BIT BUS TXRX 56-TSSOP
***as Instruments
The 'ABT16833 consist of two noninverting 8-bit to 9-bit parity bus transceivers and are designed for communication between data buses. For each transceiver, when data is transmitted from the A bus to the B bus, an odd-parity bit is generated and output on the parity I/O pin (1PARITY or 2PARITY). When data is transmitted from the B bus to the A bus, 1PARITY (or 2PARITY) is configured as an input and combined with the B-input data to generate an active-low error flag if odd parity is not detected. The error (1 or 2) output is configured as an open-collector output. The B-to-A parity-error flag is clocked into 1 (or 2) on the low-to-high transition of the clock (1CLK or 2CLK) input. 1 (or 2) is cleared (set high) by taking the clear (1 or 2) input low. The output-enable ( and) inputs can be used to disable the device so that the buses are effectively isolated. When both and are low, data is transferred from the A bus to the B bus and inverted parity is generated. Inverted parity is a forced error condition that gives the designer more system diagnostic capability. To ensure the high-impedance state during power up or power down, should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54ABT16833 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT16833 is characterized for operation from -40°C to 85°C.
Part # Description Stock Price
74ABT16833DGGRG4
DISTI # 74ABT16833DGGRG4-ND		IC TXRX NON-INVERT 5.5V 56TSSOP
RoHS: Compliant
Min Qty: 2000
Container: Tape & Reel (TR)		Limited Supply - Call
    74ABT16833DGGRG4
    DISTI # 595-74ABT16833DGGRG4    		Bus Transceivers Dual 8-9B Parity Bus Xceivers
    RoHS: Compliant    		0
      Image Part # Description
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      OMO.#: OMO-74ABT16833DGGRG4-TEXAS-INSTRUMENTS

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      Availability
      Stock:
      Available
      On Order:
      4500
      Enter Quantity:
      Current price of 74ABT16833DGGRG4 is for reference only, if you want to get best price, please submit a inquiry or direct email to our sales team sales@omo-ic.com
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