Texas Instruments' F2803x Piccolo family of microcontrollers provides the power of the C28x core and control law accelerator (CLA) coupled with highly integrated control peripherals in low pin-count devices. This family is code-compatible with previous C28x-based code, and also provides a high level of analog integration.
An internal voltage regulator allows for single-rail operation. Enhancements have been made to the HRPWM to allow for dual-edge control (frequency modulation). Analog comparators with internal 10-bit references have been added and can be routed directly to control the PWM outputs. The ADC converts from 0 to 3.3 V fixed full-scale range and supports ratio-metric VREFHI/VREFLO references. The ADC interface has been optimized for low overhead and latency.
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- High-efficiency 32-bit CPU (TMS320C28x)
- 60 MHz (16.67 ns cycle time)
- 16 x 16 and 32 x 32 MAC operations
- 16 x 16 dual MAC
- Harvard bus architecture
- Atomic operations
- Fast interrupt response and processing
- Unified memory programming model
- Code-efficient (in C/C++ and assembly)
- Programmable control law accelerator (CLA)
- 32-bit floating-point math accelerator
- Executes code independently of the main CPU
- Endianness: Little Endian
- JTAG boundary scan support
- IEEE standard 1149.1-1990 standard test access port and boundary scan architecture
- Low cost for both device and system:
- Single 3.3 V supply
- No power sequencing requirement
- Integrated power-on reset and brown-out reset
- Low power
- No analog support pins
- Clocking:
- Two internal zero-pin oscillators
- On-chip crystal oscillator and external clock input
- Watchdog timer module
- Missing clock detection circuitry
- Up to 45 individually programmable, multiplexed GPIO pins with input filtering
- Peripheral interrupt expansion (PIE) block that supports all peripheral interrupts
- Three 32-bit CPU timers
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- Independent 16-bit timer in each enhanced pulse width modulator (ePWM)
- On-chip memory
- Flash, SARAM, OTP, boot ROM available
- Code-security module
- 128-bit security key and lock
- Protects secure memory blocks
- Prevents firmware reverse engineering
- Serial port peripherals
- One serial communications interface (SCI) universal asynchronous receiver/transmitter (UART) module
- Two serial peripheral interface (SPI) modules
- One inter-integrated-circuit (I2C) module
- One local interconnect network (LIN) module
- One enhanced controller area network (eCAN) module
- Enhanced control peripherals
- ePWM
- High-resolution PWM (HRPWM)
- Enhanced capture (eCAP) module
- High-resolution input capture (HRCAP) module
- Enhanced quadrature encoder pulse (eQEP) module
- Analog-to-digital converter (ADC)
- On-chip temperature sensor
- Comparator
- Advanced emulation features
- Analysis and breakpoint functions
- Real-time debug through hardware
- 2803x packages
- 56-pin RSH very thin quad flatpack (no lead) (VQFN)
- 64-pin PAG thin quad flatpack (TQFP)
- 80-pin PN low-profile quad flatpack (LQFP)
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