© Semiconductor Components Industries, LLC, 2009
December, 2009 Rev. 6
1 Publication Order Number:
CAT28C256/D
CAT28C256
256 kb Parallel EEPROM
Description
The CAT28C256 is a fast, low power, 5 Vonly CMOS Parallel
EEPROM organized as 32K x 8bits. It requires a simple interface for
insystem programming. Onchip address and data latches,
selftimed write cycle with autoclear and V
CC
power up/down write
protection eliminate additional timing and protection hardware. DATA
Polling and Toggle status bits signal the start and end of the selftimed
write cycle. Additionally, the CAT28C256 features hardware and
software write protection.
The CAT28C256 is manufactured using ON Semiconductors
advanced CMOS floating gate technology. It is designed to endure
100,000 program/erase cycles and has a data retention of 100 years.
The device is available in JEDEC approved 28pin DIP, 28pin TSOP
or 32pin PLCC packages.
Features
Fast Read Access Times: 120/150 ns
Low Power CMOS Dissipation:
– Active: 25 mA Max.
– Standby: 150 mA Max.
Simple Write Operation:
– Onchip Address and Data Latches
– Selftimed Write Cycle with Autoclear
Fast Write Cycle Time:
5 ms Max.
CMOS and TTL Compatible I/O
Hardware and Software Write Protection
Automatic Page Write Operation:
1 to 64 Bytes in 5 ms
Page Load Timer
End of Write Detection:
Toggle Bit
DATA Polling
100,000 Program/Erase Cycles
100 Year Data Retention
Commercial, Industrial and Automotive Temperature Ranges
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
ORDERING INFORMATION
PLCC32
N, G SUFFIX
CASE 776AK
Address InputsA
0
A
14
Data Inputs/OutputsI/O
0
I/O
7
Chip EnableCE
Output EnableOE
Write EnableWE
5 V SupplyV
CC
FunctionPin Name
PIN FUNCTION
GroundV
SS
No ConnectNC
PDIP28
P, L SUFFIX
CASE 646AE
TSOP28
T13, H13 SUFFIX
CASE 318AE
CAT28C256
http://onsemi.com
2
PIN CONFIGURATION
PLCC Package (N, G)DIP Package (P, L) TSOP Package (8 mm X 13.4 mm) (T13, H13)
5
4
7
6
3
2
1
10
9
12
11
8
24
25
22
23
26
27
28
19
20
17
18
21
V
CC
WE
A
11
A
10
CE
I/O
7
I/O
6
I/O
5
A
14
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
I/O
0
V
SS
5
7
6
10
9
12
11
8
13
14 1516 1718 19 20
4 3 2 1 32 31 30
29
27
28
24
25
22
23
26
21
A
8
A
9
A
11
NC
OE
A
10
CE
I/O
7
I/O
6
A
7
A
12
A
14
NC
V
CC
WE
A
13
A
6
A
5
A
4
A
3
A
2
A
1
A
0
NC
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
V
SS
NC
OE
A
11
5
4
7
6
3
2
1
10
9
12
11
8
14
13
A
9
A
8
A
13
WE
24
25
22
23
26
27
28
19
20
17
18
21
15
16
A
4
A
3
A
6
A
5
A
7
A
12
A
14
V
CC
A
10
CE
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
GND
I/O
2
I/O
1
I/O
0
A
0
A
1
A
2
(Top Views)
14
13
15
16
I/O
4
I/O
3
A
13
A
8
A
9
OE
I/O
1
I/O
2
Figure 1. Block Diagram
ADDR. BUFFER
& LATCHES
ADDR. BUFFER
& LATCHES
INADVERTENT
CONTROL
LOGIC
TIMER
HIGH VOLTAGE
GENERATOR
I/O BUFFERS
32,768 x 8
EEPROM
ARRAY
CE
OE
WE
V
CC
A
0
A
5
A
6
A
14
WRITE
PROTECTION
COLUMN
DECODER
ROW
DECODER
DATA POLLING
AND
TOGGLE BIT
I/O
0
I/O
7
64 BYTE PAGE
REGISTER
CAT28C256
http://onsemi.com
3
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameters Ratings Units
Temperature Under Bias –55 to +125 °C
Storage Temperature –65 to +150 °C
Voltage on Any Pin with Respect to Ground (Note 1) –2.0 V to +V
CC
+ 2.0 V V
V
CC
with Respect to Ground 2.0 to +7.0 V
Package Power Dissipation Capability (T
A
= 25°C) 1.0 W
Lead Soldering Temperature (10 secs) 300 °C
Output Short Circuit Current (Note 2) 100 mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The minimum DC input voltage is 0.5 V. During transitions, inputs may undershoot to 2.0 V for periods of less than 20 ns. Maximum DC
voltage on output pins is V
CC
+ 0.5 V, which may overshoot to V
CC
+ 2.0 V for periods of less than 20 ns.
2. Output shorted for no more than one second. No more than one output shorted at a time.
Table 2. RELIABILITY CHARACTERISTICS (Note 3)
Symbol Parameter Test Method Min Max Units
N
END
Endurance MILSTD883, Test Method 1033 100,000 Cycles/Byte
T
DR
Data Retention MILSTD883, Test Method 1008 100 Years
V
ZAP
ESD Susceptibility MILSTD883, Test Method 3015 2,000 V
I
LTH
(Note 4) LatchUp JEDEC Standard 17 100 mA
3. These parameters are tested initially and after a design or process change that affects the parameters.
4. Latchup protection is provided for stresses up to 100 mA on address and data pins from 1 V to V
CC
+ 1 V.
Table 3. D.C. OPERATING CHARACTERISTICS (V
CC
= 5 V ±10%, unless otherwise specified.)
Symbol Parameter Test Conditions
Limits
Units
Min Typ Max
I
CC
V
CC
Current (Operating, TTL) CE = OE = V
IL
,
f = 8 MHz, All I/O’s Open
30 mA
I
CCC
(Note 5) V
CC
Current (Operating, CMOS) CE = OE = V
ILC
,
f = 8 MHz, All I/O’s Open
25 mA
I
SB
V
CC
Current (Standby, TTL) CE = V
IH
, All I/O’s Open 1 mA
I
SBC
(Note 6) V
CC
Current (Standby, CMOS) CE = V
IHC
, All I/O’s Open 150
mA
I
LI
Input Leakage Current V
IN
= GND to V
CC
10 10
mA
I
LO
Output Leakage Current V
OUT
= GND to V
CC
,
CE = V
IH
10 10
mA
V
IH
(Note 6) High Level Input Voltage 2 V
CC
+ 0.3 V
V
IL
(Note 5) Low Level Input Voltage 0.3 0.8 V
V
OH
High Level Output Voltage
I
OH
= 400 mA
2.4 V
V
OL
Low Level Output Voltage I
OL
= 2.1 mA 0.4 V
V
WI
Write Inhibit Voltage 3.5 V
5. V
ILC
= 0.3 V to +0.3 V.
6. V
IHC
= V
CC
0.3 V to V
CC
+ 0.3 V.

CAT28C256H1315

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
EEPROM (32kx8) 256K 5V 150
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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