NCP1000, NCP1001, NCP1002
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10
reliability in overload conditions. Figure 20 shows the
timing waveforms in auto restart mode.
The V
CC
pin receives its startup power from the high
voltage startup circuit. Once the undervoltage lockout trip
point is exceeded, the high voltage startup circuit turns off,
and the V
CC
pin receives its power from the auxiliary
winding of the power transformer. Once the converter is
enabled, the V
CC
voltage will be clamped by the 8.6 V
limiter. Since the voltage limiter will regulate the V
CC
voltage at 8.6 V, it must shunt all excess current based on the
input impedance to this pin. A resistor is required between
the auxiliary winding filter capacitor and the V
CC
pin to
limit the current.
Optocoupler Fail--safe Circuit
The NCP100x has the ability to sense an open optocoupler
and protect the load in the event of a failure. This circuit
operates by sensing the current in the V
CC
limiter, and
detecting a high current which is an indication of an open
optocoupler.
The V
CC
pin receives the output of a current source which
is created by the voltage drop between the auxiliary winding
and the V
CC
limiter across the shunt resistor. The Vcc limiter
will clamp the V
CC
voltage to approximately 8.6 V. Any
current that is available at this pin, that is not needed for
either the chip bias current, or the opto current is shunted
through this limiter.
The opto fail--safe circuit operates on the premise that
under an open opto condition, the opto current will all be
shunted through the V
CC
limiter, and the output voltage (and
therefore the auxiliary winding voltage) will increase. The
increase in auxiliary winding voltage will cause an
amplified increase in the current into the V
CC
pin. To detect
an open opto condition, the current in the limiter is measured
and if it exceeds 10 milliamps, the chip will shut down and
go into burst mode operation. After a shutdown signal, the
optocoupler fail--safe circuit will enable the
divide--by--eight counter and attempt to restart the unit after
every eight V
CC
cycles.
For this circuit to operate properly, the shunt resistor must
be chosen prudently. There is a range of values for R
S
that
will determine the operation of this circuit. On one extreme,
a large value of R
S
will minimize the bias current, which will
have the effect of maximizing efficiency, while reducing the
response to an open optocoupler. The other extreme is the
minimum value of R
S,
which will maximize the bias current
into the chip and minimize the voltage overshoot in the event
of an open optocoupler
.
For minimum bias current:
Rs
max
=
(V
AUXmin
− 8.8 volts)
I
CC1max
where:
V
AUXmin
is the minimum expected DC voltage from the
auxiliary winding.
Typically, this voltage will vary between 5% to 10%
from it’s nominal value.
I
CC1max
is the maximum rated bias current for the device
used. This value can found in the tables on the data sheet.
For the best optocoupler fail--safe response:
Rs
min
=
(V
AUXmax
− 7.2 volts)
1.0mA + I
trip
where:
V
AUXmax
is the maximum expected DC voltage from the
auxiliary winding.
I
trip
is the minimum trip current for the optocoupler
fail --safe. This information can be found in the tables under
Current Limit and Thermal Protection,aswellasin
Figure 12.
The value of R
S
that is used in the circuit must be between
the two extreme values calculated. Setting it closer to R
Smin
will optimize the optocoupler fail--safe feature, while setting
it closer to the R
Smax
value will minimize the bias current
Thermal Shutdown and Package
The internal Thermal Shutdown block protects the device
in the event that the maximum junction temperature is
exceeded. When activated, typically at 140C, one input of
the Driver is held low to disable the Power Switch Circuit.
Thermal shutdown activation is non--latching and the Power
Switch Circuit is allowed resume operation when the
junction temperature falls below 110C. The thermal
shutdown feature is provided to prevent catastrophic device
failures from accidental overheating. It is not intended to be
used as a substitute for proper heatsinking.
The die in the 8--pin dual--in--line package is mounted on
a special heat tab copper alloy lead frame. The tab consists
of pins 3, 6, 7, 8 is specifically designed to improve the
thermal conduction from the die to the printed circuit board.
This permits the use of standard layout and mounting
practices while having the ability to halve the junction to air
thermal resistance.
