5P49V6965-EVK Datasheet 5P49V6975-EVK, 5P49V6965-EVK | P4-P6

VersaClock

6E - 5P49V60, 5P49V6965 and 5P49V6975 Evaluation Board User Guide

Connecting the Board to a Computer

The evaluation board can be connected to a computer with the USB connector. The on-board USB-to-I

C bridge (FTDI chip) does the

data communication and the +5V in the USB bus powers the on-board regulators. Using a bench power supply with the V

jacks is

optional. The board can fully function with just the USB cable to a computer.

IDT's Timing Commander software can control the VersaClock 6E device on the board. Timing Commander is compatible with both the

on-board USB-to-I

C bridge and the Aardvark adapter. Timing Commander displays a block diagram where you can enter the

configuration. You can then program that configuration into the VersaClock 6E device on the board where Timing Commander defines the

proper hex-code sequence to program into the device.

The jumpers J18, J19, J20 and J21 configure the I

C configuration.

Figure 4. Configure I

C Operation

Labels “SDA” and “SCL” to the left in the schematic connect to the USB-to-I

C bridge chip. When using an Aardvark or when operating

the SEL0/1 switches, jumpers JP20 and JP21 need to be removed to disconnect the USB-to-I

C bridge. Labels “SEL1_SDA” and

“SEL0_SCL” to the right in the schematic are the SEL1/SDA and SEL0/SCL pins on the VersaClock 6E device.

VersaClock

6E - 5P49V60, 5P49V6965 and 5P49V6975 Evaluation Board User Guide

U2 Switch Operation

The DIP switch block U2 has 8 switches, of which 5 are used.

Figure 5. U2 Switches

The switches connect to pins on the VersaClock 6E devices. The middle position leaves the pin open. This is the default for each switch.

Move to the “+” side to pull the pin high and move to the “-” side to pull the pin low.

– Switch 1 = OE: Connects to the SD/OE pin for output enable or shut-down operation.

– Switch 2 = SEL0: Connects to the SEL0/SCL pin. The main purpose of this switch is to operate SEL0 when the device has

started in hardware select mode. This switch can also be used to add an extra pull-up (10kΩ) on the SCL line for I

C operation.

– Switch 3 = SEL1: Connects to the SEL1/SDA pin. The main purpose of this switch is to operate SEL1 when the device has

started in hardware select mode. This switch can also be used to add an extra pull-up (10kΩ) on the SDA line for I

C operation.

– Switch 4 = CLKSEL: Connects to the CLKSEL pin for selecting between crystal input or CLKIN differential clock input.

Table 2. Configure I

C Operation

Function JP18 JP19 JP20 JP21

Uses on-board USB-to-I

C bridge. Yes Yes Yes Yes

Uses Aardvark or other adapter connected to JP1.

The adapter has its own pull-ups enabled.

No No No No

Uses Aardvark or other adapter connected to JP1.

The adapter does not have pull-ups, or, has them disabled.

Yes Yes No No

Operates the SEL0 and SEL1 switches. No No No No

VersaClock

6E - 5P49V60, 5P49V6965 and 5P49V6975 Evaluation Board User Guide

– Switch 8: Pulls on the OUT0_SELB_I2C pin on the device to select the operation mode at power-up. The state of the

OUT0_SELB_I2C pin is latched at power-up. The operation mode effectively sets the function of the SEL0/SCL and SEL1/SDA

pins. The OUT0_SELB_I2C pin has an on-chip pull-down so switch 8 in the center or “-” position has the same effect and results

in startup with the I

C mode. In I

C mode, the two pins have the SDA and SCL function for I

C operation. With the switch in the

“+” position, the device will start in Hardware Select mode. In Hardware Select mode, the two pins have the SEL0 and SEL1

function for selecting a preprogrammed configuration.

Operating Modes

As explained above at switch 8, the VersaClock 6E device can start up in two different operating modes: I

C mode or Hardware Select

mode. The evaluation board is shipped with a “blank” VersaClock 6E device, without configurations pre-programmed into OTP. Without

configurations pre-programmed, the Hardware Select mode cannot be used. The “blank” device will start with a default or “test”

configuration where output 0 and output 1 are enabled. Output 0 will be 25MHz and output 1 will be 100MHz with LVCMOSD logic. You

can then program a configuration into the device into volatile registers with Timing Commander to test a configuration. This works without

“burning” the permanent OTP memory and most users of this evaluation board will never burn OTP. This way the board can be used

again and again to test configurations. Burning configurations into OTP is only useful when studying the Hardware Select mode and the

transition from one configuration to another.

Note: Burning configurations into OTP is permanent and cannot be undone.

P1-P3 P4-P6 P7-P9 P10-P12 P13-P14

5P49V6965-EVK

Mfr. #:

Buy 5P49V6965-EVK

Manufacturer:

IDT

Description:

Clock & Timer Development Tools VersaClock 6E Standard Part EVK

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New from this manufacturer.

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5P49V6965-EVK

5P49V6965-EVK

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