TC3401
DS21410B-page 10 2002 Microchip Technology Inc.
3.3 V
DD
Monitor
The TC3401 RESET output is in high impedance
provided the voltage at V
TH
is greater than the internal
voltage reference. This reference is approximately the
same value as the voltage appearing at REF
OUT
.When
V
TH
is less than the internal reference, RESET is pulled
low. When V
TH
rises above the internal reference
voltage again, RESET
is held low for the reset active
time-out period, t
9
, before being released. The RESET
output is ensured to be valid for V
DD
= 1.3V to 5.5V.
When used to generate a Power-on or Brown-out
Reset, an external resistor network is required to divide
the appropriate V
DD
threshold down to 1.23V at the
V
TH
input, (See the Typical Application circuit). For
example, to generate a POR for a V
DD
at 3V -10%, the
values of R1 and R2 should be 137kΩ and 115kΩ
respectively.
Since RESET
is an open drain, it can be wired-OR’ed
with another open drain or external switch if desired.
3.4 Power Fail Detector
The Power Fail detector is a comparator in which the
inverting input is connected to the internal voltage
reference. The non-inverting input is the PFI pin of the
TC3401 and the PFO
pin is the active low, open drain
output. This comparator is suitable as an early warning
fail or low battery indicator. In a typical application,
where a voltage regulator is being used to supply
power to a system, the Power Fail comparator would
monitor the input voltage to the regulator while the V
DD
monitor would measure the output voltage of the
regulator. Both PFO
and RESET would drive interrupt
pins of a microcontroller.
ThePowerFaildetectormaybeusedasaWake-upor
Watchdog Timer. The Typical Application circuit shows
an RC network on PFI with the capacitor tied to a
tristated µC I/O pin. If R4 is 1 MΩ and C2 is 10µF, t h e
time constant is roughly ten seconds. The µC resets
the RC network by driving the I/O tied to PFI low and
then tristating it. The RC network will ramp to 1.23V in
roughly 9 seconds, assuming a V
BATT
of 3.0V. With
PFO
tied to a µC input or interrupt, the µC will see a low
to high transition on PFO
when the voltage on PFI
exceeds 1.23V. The PFO
output is specified to be valid
for V
DD
=1.3to5.5V.
