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TC3401VPE

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
2002 Microchip Technology Inc. DS21410B-page 7
TC3401
FIGURE 3-2: CONVERSION AND DATA OUTPUT TIMING
FIGURE 3-3: RESET AND POWER FAIL TIMING
SCLK
SDAT
t
4
t
1
t
2
t
3
t
8
t
8
D
N-1
D
N-1
D
0
(LSB)
D
N
(MSB)
t
5
Data Conversion
Complete
Sleep
Mode
ADDR
Start Conversion and Resolution Control Timing Data Output Timing
t
6
t
7
RESET
0
V
TH
1.23
V
DD
Reset Generator Timing
t
9
t
11
Power Fail Com
p
arator Timin
g
1.1
1.20
Hysteresis
Time
Volts
PFO
0
PFI
1.23
t
10
t
10
t
10
t
10
1.1
1.20
Hysteresis
Time
Volts
V
DD
V
DD
t
9
t
11
1.80
TC3401
DS21410B-page 8 2002 Microchip Technology Inc.
FIGURE 3-4: SCLK AND SDAT WAVEFORMS FOR 16, 12 AND 10-BIT CONVERSIONS
SCLK
SDAT
t
3
a
16-bit Data Conversion,
Data Word A5A5h
SCLK
SDAT
16-bit Data Conversion, Long Start Pulse,
Data Word 5A5Ah
> t
3
a
Data Conversion
Complete
SCLK
SDAT
12-bit Conversion,
Data Word = AB3h
SCLK
SDAT
t
3
g
10-bit Conversion with "Extra"
Data Reduction Clocks, Data Word = 3A4h
Data Conversion
Complete
Data Conversion
Complete
Data Conversion
Complete
t
3
e
< t
4
< t
4
2002 Microchip Technology Inc. DS21410B-page 9
TC3401
FIGURE 3-5: A/D OPERATIONAL FLOWCHART
Yes
No
Yes
No
Yes
Yes
Yes
No
No
No
Yes
Yes
No
Yes
No
POR
Sleep
SDAT = High
SCLK
Hgh to Low?
Power Up Analog,
Start CONVCLK (= 0),
Start Conversion,
Resolution = 2m
(m = 16), Latch Input
Channel Address (if applicable).
SCLK
Low to High
transition?
SDAT = Low
CONVCLK
< 2
9
?
SCLK
High to Low?
A/D
Resolution
> 2
10
?
Reduce A/D
Resolution by 1-bit
(m = m – 1);
SDAT = High
SDAT = Low
CONVCLK = 2m?
(Conversion Done?)
Power Down Analog,
Conversion Complete,
SDAT = High
SCLK
High to Low?
SDAT = Dm;
m = m – 1
m ≥ 0?
SDAT = High
Internal Reset
Sleep
No
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

TC3401VPE

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IC ADC 16BIT 1.8V DUAL LP 16DIP
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