Shutdown mode is temporarily overridden by the dis-
play test function.
Serial Interface
Serial Addressing
The MAX6956 operates as a slave that sends and
receives data through an I
2
C-compatible 2-wire inter-
face. The interface uses a serial data line (SDA) and a
serial clock line (SCL) to achieve bidirectional commu-
nication between master(s) and slave(s). A master (typ-
ically a microcontroller) initiates all data transfers to and
from the MAX6956, and generates the SCL clock that
synchronizes the data transfer (Figure 2).
The MAX6956 SDA line operates as both an input and
an open-drain output. A pullup resistor, typically 4.7k,
is required on SDA. The MAX6956 SCL line operates
only as an input. A pullup resistor, typically 4.7k, is
required on SCL if there are multiple masters on the 2-
wire interface, or if the master in a single-master system
has an open-drain SCL output.
Each transmission consists of a START condition
(Figure 3) sent by a master, followed by the MAX6956
7-bit slave address plus R/W bit (Figure 6), a register
address byte, one or more data bytes, and finally a
STOP condition (Figure 3).
Start and Stop Conditions
Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmis-
sion with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master
MAX6956
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port LED Display Driver and I/O Expander
_______________________________________________________________________________________________________ 7
SLAVE ADDRESS BYTE
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
R/W
8
8
CEDATA
8
SDA
SCL
TEST REGISTER
INTENSITY REGISTERS
PORT REGISTERS
LED DRIVERS AND GPIO
INTENSITY
CONFIGURATION
TEST
P4 TO P31
LED DRIVERS
OR GPIO
ADDRESS
MATCHER
AD0
AD1
COMMAND BYTEDATA BYTE
R/W7-BIT DEVICE ADDRESS
7
7
TO COMMAND REGISTERS
TO/FROM DATA REGISTERS
SEGMENT OR
GPIO DATA
R/W
CONFIGURATION
REGISTERS
PORT CHANGE
DETECTOR
MASK REGISTER
COMMAND
REGISTER DECODE
8
DATA BYTE COMMAND BYTE
MAX6956
Figure 1. MAX6956 Functional Diagram
MAX6956
has finished communicating with the slave, it issues a
STOP (P) condition by transitioning SDA from low to
high while SCL is high. The bus is then free for another
transmission (Figure 3).
Bit Transfer
One data bit is transferred during each clock pulse.
The data on SDA must remain stable while SCL is high
(Figure 4).
Acknowledge
The acknowledge bit is a clocked 9th bit, which the
recipient uses to handshake receipt of each byte of
data (Figure 5). Thus, each byte transferred effectively
requires 9 bits. The master generates the 9th clock
pulse, and the recipient pulls down SDA during the
acknowledge clock pulse, such that the SDA line is sta-
ble low during the high period of the clock pulse. When
the master is transmitting to the MAX6956, the
MAX6956 generates the acknowledge bit because the
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port LED Display Driver and I/O Expander
8 _______________________________________________________________________________________
Figure 2. 2-Wire Serial Interface Timing Details
SCL
SDA
START CONDITIONSTOP CONDITION
REPEATED START CONDITION
START CONDITION
t
SU, DAT
t
HD, DAT
t
LOW
t
HD, STA
t
HIGH
t
R
t
F
t
SU, STA
t
HD, STA
t
SU, STO
t
BUF
Figure 3. Standard Stop Conditions
SDA
SCL
S
START
CONDITION
P
STOP
CONDITION
SDA
SCL
DATA LINE STABLE;
DATA VALID
CHANGE OF DATA ALLOWED
Figure 4. Bit Transfer
MAX6956 is the recipient. When the MAX6956 is trans-
mitting to the master, the master generates the
acknowledge bit because the master is the recipient.
Slave Address
The MAX6956 has a 7-bit-long slave address (Figure 6).
The eighth bit following the 7-bit slave address is the
R/W bit. It is low for a write command, high for a read
command.
The first 3 bits (MSBs) of the MAX6956 slave address
are always 100. Slave address bits A3, A2, A1, and A0
are selected by address inputs, AD1 and AD0. These
two input pins may be connected to GND, V+, SDA, or
SCL. The MAX6956 has 16 possible slave addresses
(Table 3) and therefore, a maximum of 16 MAX6956
devices may share the same interface.
Message Format for Writing
the MAX6956
A write to the MAX6956 comprises the transmission of
the MAX6956’s slave address with the R/W bit set to
zero, followed by at least 1 byte of information. The first
byte of information is the command byte. The com-
mand byte determines which register of the MAX6956
is to be written by the next byte, if received. If a STOP
condition is detected after the command byte is
received, then the MAX6956 takes no further action
(Figure 8) beyond storing the command byte.
Any bytes received after the command byte are data
bytes. The first data byte goes into the internal register of
the MAX6956 selected by the command byte (Figure 9). If
multiple data bytes are transmitted before a STOP condi-
tion is detected, these bytes are generally stored in subse-
quent MAX6956 internal registers because the command
byte address generally autoincrements (Table 4).
Message Format for Reading
The MAX6956 is read using the MAX6956’s internally
stored command byte as address pointer, the same
way the stored command byte is used as address
pointer for a write. The pointer generally autoincre-
ments after each data byte is read using the same rules
as for a write (Table 4). Thus, a read is initiated by first
configuring the MAX6956’s command byte by perform-
MAX6956
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port LED Display Driver and I/O Expander
_______________________________________________________________________________________ 9
SCL
SDA
BY TRANSMITTER
CLOCK PULSE FOR ACKNOWLEDGMENT
START CONDITION
SDA
BY RECEIVER
12 89
S
Figure 5. Acknowledge
SDA
SCL
1 0 A3 A2 A1 A00
MSB
LSB
R/W
ACK
Figure 6. Slave Address

MAX6956ATL+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
LED Display Drivers 2.5-5.5V 20/28Port LED Display Driver
Lifecycle:
New from this manufacturer.
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