15
LTC3564
3564f
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3564. These items are also illustrated graphically in
Figures 4 and 5. Check the following in your layout:
1. The power traces, consisting of the GND trace, the SW
trace and the V
IN
trace should be kept short, direct and
wide.
2. Does the V
FB
pin connect directly to the feedback
resistors? The resistive divider R1/R2 must be con-
nected between the (+) plate of C
OUT
and ground.
3. Does the (+) plate of C
IN
connect to V
IN
as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
4. Keep the switching node, SW, away from the sensitive
V
FB
node.
5. Keep the (–) plates of C
IN
and C
OUT
as close as possible.
Design Example
As a design example, assume the LTC3564 is used in a
single lithium-ion battery-powered cellular phone
application. The V
IN
will be operating from a maximum of
4.2V down to about 2.7V. The load current requirement
is a maximum of 1.25A but most of the time it will be in
standby mode, requiring only 2mA. Efficiency at both low
Figure 6a. Typical Application Figure 6b. Efficiency vs Output Current
and high load currents is important. Output voltage is
2.5V. With this information we can calculate L using
equation (1),
L
fI
V
V
V
L
OUT
OUT
IN
=
()
Δ
()
−
⎛
⎝
⎜
⎞
⎠
⎟
1
1
(3)
Substituting V
OUT
= 2.5V, V
IN
= 4.2V, ΔI
L
= 500mA and
f = 2.25MHz in equation (3) gives:
L=
2.5V
2.25MHz(500mA)
1
25
42
09−
⎛
⎝
⎜
⎞
⎠
⎟
=
.
.
.
V
V
μHH
A 1μH or 1.1μH inductor works well for this application.
For best efficiency choose a 1.5A or greater inductor with
less than 0.1Ω series resistance.
C
IN
will require an RMS current rating of at least 0.6A ≅
I
LOAD(MAX)
/2 at temperature and C
OUT
will require an ESR
of less than 0.125Ω. In most cases, a ceramic capacitor
will satisfy this requirement.
For the feedback resistors, choose R1 = 316k. R2 can
then be calculated from equation (2) to be:
R
V
Rk
OUT
2
06
1 1 1000= −
⎛
⎝
⎜
⎞
⎠
⎟
=
.
Figure 6 shows the complete circuit along with its effi-
ciency curve.
APPLICATIO S I FOR ATIO
WUU
U
V
IN
C
IN
**
22μF
CER
V
IN
2.7V
TO 4.2V
LTC3564
RUN
4
1.1μH*
22pF
1M
316k
3564 F06a
1
3
5
2
SW
V
FB
GND
C
OUT
**
22μF
CER
V
OUT
2.5V
*TOKO A915AY-1R1M (D53LC SERIES)
** TAIYO YUDEN JMK316BJ226ML
OUTPUT CURRENT (mA)
70
EFFICIENCY (%)
80
85
95
100
0.1 10 100 1000
3564 F06b
60
1
90
75
65
V
OUT
= 2.5V
V
IN
= 2.7V
V
IN
= 3.6V
V
IN
= 4.2V
